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{{AppliesToSBCLynx}}
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{{ImportantMessage|text=SBC Lynx is extremely flexible in terms of hardware configurations. This document details connector's pinout of common SBC Lynx models. For more information about models not documented here, please contact [mailto:sales@dave.eu Sales department].}}
=Introduction=
This document details connectors, buttons and switches that equip SBC Lynx board. '''Please note that not all of them are available on all models'''.
For some connectors, information related to the internal connections to the processor are provided. In these cases, 14x14mm-package processor's balls references are indicated.
The following table lists connectors, buttons and switches available on SBC Lynx.
| J48||USB host||USB type A Right Angle||Wurth WE-614 004 134 726||
|-
| J34|| MPUART0 ( RS232 / RS485 / RS422 )||DB9 90° Connector Male or Female|| ||[2], [3]
|-
| J38|| MPUART0 ( RS232 / RS485 / RS422 )||3-pins Header, Male Pins, Shrouded 0.200in pitch||Phoenix 1755749 MSTBVA2.5/3-G5.08||[23]
|-
||J21||MPUART1 ( RS232 / RS485 / RS422 / CAN)||DB9 90° Connector Male or Female|| ||[32], [4]
|-
||J39||MPUART1 ( RS232 / RS485 / RS422 / CAN)||3-pins Header, Male Pins, Shrouded 0.200in pitch||Phoenix 1755749 MSTBVA2.5/3-G5.08||[32]
|-
||J40||CAN||3-pins Header, Male Pins, Shrouded 0.200in pitch||Phoenix 1755749 MSTBVA2.5/3-G5.08||[4]
|-
||J46||[[:Category:DWM|DAVE DWM WiFi/Bluetooth module]] interface||30-pins SlimStack™ Receptacle 0.50mm pitch||Molex 52991-0308 ||
[1] These parts are mutually exclusive.
[2] These parts Because mechanical interferences, the following combinations are mutually exclusive.allowed:{|class="wikitable" style="text-align: center;"|-!Reference!Option #1!Option #2!Option #3!Option #4!Option #5|-| J39||populated||not populated||not populated||not populated||not populated|-| J21||not populated||populated||populated||not populated||not populated|-| J34||not populated||populated||not populated||populated||not populated|}
[3] These parts are mutually exclusive.
[4] These parts are mutually exclusive.
The following image shows where connectors, buttons and switches are located.
==Power supply connector (J35 / JP1)==
===J35===
[[File:SBC Lynx-J35.png|thumb|center|300px|J35]]
{|class="wikitable" style="text-align: center;"
|-
|}
===JP1===
[[File:SBC Lynx-JP1.png|thumb|center|300px|JP1]]
{|class="wikitable" style="text-align: center;"
|-
==Serial console (J42)==
[[File:SBC Lynx-J42.png|thumb|center|300px|J42]]
System console is by default routed to this interface. This is typically used during the development stage.
|4||-||DGND||Ground||-||-||-
|}
J42 connector is compatible with [http://www.ftdichip.com/Support/Documents/DataSheets/Cables/DS_TTL-232RG_CABLES.pdf FTDI TTL-232RG-VIP-WE cable]. To connect it, please use this wiring:
*J42.1: yellow wire
*J42.2: orange wire
*J42.3: red wire
*J42.4: black wire
==Ethernet connector (J16)==
[[File:SBC Lynx-J16.png|thumb|center|300px|J16]]
J16 is a standard RJ45 10/100BaseT Ethernet connector - incorporating magnetics - connected to the Ethernet controller and PHY.
J16 integrates a green status LED providing connection information:
*LED on: link established
*LED blinking: activity.
The following table describes the interface signals:
{|class="wikitable" style="text-align: center;"
==microSD slot (J43)==
[[File:SBC Lynx-J43.png|thumb|center|300px|J43]]
J43 is a push-pull microSD card slot connected to uSDHC1 port of MX6UL processor.
|13||CD||Card detect||Pulled-up to 3.3V
|}
==USB host port (J48)==
[[File:SBC Lynx-J48.png|thumb|center|300px|J48]] J48 is a standard USB Type A right angle connector connected to the MX6UL USB_OTG2 port signals. The following table reports the connector's pinout:
{|class="wikitable" style="text-align: center;"
| align="center" style="background:#f0f0f0;"|'''Pin #'''
|-
|}
==USB OTG port (J47)==
[[File:SBC Lynx-J47.png|thumb|center|300px|J47]] J47 is a standard USB Type micro AB connector connected to the MX6UL USB_OTG1 port signals. The following table reports the connector's pinout:
{|class="wikitable" style="text-align: center;"
| align="center" style="background:#f0f0f0;"|'''Pin #'''
|-
|}
==Mezzanine board connectors (J53/J54)==
{| class="wikitable" | width="100%"
| [[File:SBC Lynx-J53-J54.png|thumb|center|300px|J53-J54]]
| [[File:SBCLYNX_ADDON_XUAL Mounted.JPG|thumb|center|300px|Example of mezzanine usability]]
|}
J53 and J54 are 10x1-pin 2.54mm-pitch vertical headers for optional mezzanine expansion boards. These boards can be implemented to extend SBC Lynx functionalities and/or interfaces.
[5] '''To be used for voltage reference only'''.
===Handling bootstrap signals===
MEZZANINE_GP0, MEZZANINE_GP1 and MEZZANINE_GP2 are connected to LCD_DATA19, LCD_DATA22 and LCD_DATA23 respectively. As such, they act as bootstrap configuration signals as well. They can be used by application software freely and the they can be connected to user's application circuitry. However, '''any electrical interference during the processor reset cycle must be avoided'''.
There are different solutions to comply with this requirement. The following image shows a concept solution for this problem.
==One-piece interfaces (J45 / J52)==
{| class="wikitable" | width="100%"
| [[File:SBC Lynx-J45-52.png|thumb|center|300px|J45]]
| [[File:XUAE-side-mount.png|thumb|center|300px|example of possible connections on J45]]
| [[File:Mech-design-XUAE-bottom.png|thumb|center|300px|J52]]
| [[File:SBC-Lynx-onepiece-bottom.png|thumb|center|300px|example of possible connections on J52]]
|}
J45 and J52 are two interfaces designed to be populated with Samtec 1.00mm-pitch 30x2-pin FSI One-piece connectors. The peculiarity of this kind of connectors if the fact that they
*allow to mate two boards by using one connector only
| 13||-||DGND||Ground|| || ||-
|-
| 15||B9||LCD_DATA00|||| Output || IO_3.3V ||-[3]
|-
| 17||A9||LCD_DATA01|||| Output || IO_3.3V ||-[3]
|-
| 19||E10||LCD_DATA02|||| Output || IO_3.3V ||-[3]
|-
| 21||D10||LCD_DATA03|||| Output || IO_3.3V ||-[3]
|-
| 23||C10||LCD_DATA04|||| Output || IO_3.3V ||-[3]
|-
| 25||B10||LCD_DATA05|||| Output || IO_3.3V ||-[3]
|-
| 27||A10||LCD_DATA06||UART7_CTS_B|| Output || IO_3.3V ||-[3]
|-
| 29||-||DGND||Ground|| || ||-
|-
| 31||D11||LCD_DATA07||UART7_RTS_B|| Output || IO_3.3V ||-[3]
|-
| 33||B11||LCD_DATA08||FLEXCAN1_TX|| Output || IO_3.3V ||-[3]
|-
| 35||A11||LCD_DATA09||FLEXCAN1_RX|| Output || IO_3.3V ||-[3]
|-
| 37||E12||LCD_DATA10||FLEXCAN2_TX / SAI3_RX_SYNC|| Output || IO_3.3V ||-[3]
|-
| 39||D12||LCD_DATA11||FLEXCAN2_RX / SAI3_RX_BCLK|| Output || IO_3.3V ||-[3]
|-
| 41||C12||LCD_DATA12||SAI3_TX_SYNC|| Output || IO_3.3V ||-[3]
|-
| 43||-||DGND||Ground|| || ||-
| 49||U12||USB_OTG2_VBUS||USB_OTG2_VBUS|| || ||-
|-
| 51||K15||UART1_nCTSUART1_CTS_B||GPIOGPIO1_IO18|| Input || IO_3.3V ||-
|-
| 53||-||CPU_PORn||Reset|| Input || ||-
|-
| 55||-||3V3_AUX||3V3 PMIC regulator|| || ||< 1A – shared with J54.3
| 59||-||DGND||Ground|| || IO_3.3V ||-
|-
| 2||B12||LCD_DATA13||LCD_DATA13 / SAI3_TX_BCLK / SDHC2_RSTUSDHC2_RESET_B || Output || IO_3.3V ||-[3]
|-
| 4||A12||LCD_DATA14||LCD_DATA14 / SAI3_RX_DATA / SDHC2_DATA4USDHC2_DATA4 || Output || IO_3.3V ||-[3]
|-
| 6||D13||LCD_DATA15||LCD_DATA15 / SAI3_TX_DATA / SDHC2_DATA5 USDHC2_DATA5 || Output || IO_3.3V ||-[3]
|-
| 8||C13||LCD_DATA16||LCD_DATA16 / UART7_TX / SDHC2_DATA6 USDHC2_DATA6 || Output || IO_3.3V ||-[3]
|-
| 10||B13||LCD_DATA17||LCD_DATA17 / UART7_RX / SDHC2_DATA7 USDHC2_DATA7 || Output || IO_3.3V ||-[3]
|-
| 12||A13||LCD_DATA18||LCD_DATA18 PWM5_OUT / PWM5 / SDHC2_CMDUSDHC2_CMD|| Output || IO_3.3V ||-[3]
|-
| 14||D14||LCD_DATA19||LCD_DATA19 PWM6_OUT / PWM6 / SDHC2_CLKUSDHC2_CLK || Output || IO_3.3V ||-[3]
|-
| 16||C14||LCD_DATA20||LCD_DATA20 ECSPI1_SCLK / SPI1_SCLK / SDHC2_DATA0USDHC2_DATA0 || Output || IO_3.3V ||SPI1 is available only if NOR is not mounted, [3]
|-
| 18||B14||LCD_DATA21||LCD_DATA21 ECSPI1_SS0 / SPI1_SS0 / SDHC2_DATA1USDHC2_DATA1 || Output || IO_3.3V ||SPI1 is available only if NOR is not mounted, [3]
|-
| 20||A14||LCD_DATA22||LCD_DATA20 ECSPI1_MOSI / SPI1_MOSI / SDHC2_DATA2USDHC2_DATA2 || Output || IO_3.3V ||SPI1 is available only if NOR is not mounted, [3]
|-
| 22||B16||LCD_DATA23||LCD_DATA20 ECSPI1_MISO / SPI1_MISO / SDHC2_DATA3USDHC2_DATA3|| Output || IO_3.3V ||SPI1 is available only if NOR is not mounted, [3]
|-
| 24||-||DGND||Ground|| || ||-
|-
| 26||C17||ENET2_RX_DATA0||ENET2_RX_DATA0 / UART6_TX / I2C3_SCL / || Input || IO_3.3V ||Default: internally used as USB OTG power
|-
| 28||C16||ENET2_RX_DATA1||ENET2_RX_DATA1 / UART6_RX / I2C3_SDA|| Input || IO_3.3V ||Default: internally used as USB OTG over current
|-
| 30||B17||ENET2_RX_EN||ENET2_RX_EN / UART7_TX / I2C4_SCL /|| Input || IO_3.3V ||-
|-
| 32||A15||ENET2_TX_DATA0||ENET2_TX_DATA0 / UART7_RX / I2C4_SDA /|| Output || IO_3.3V ||-
|-
| 34||A16||ENET2_TX_DATA1||ENET2_TX_DATA1 / UART8_TX / SPI4_SCLK ECSPI4_SCLK || Output || IO_3.3V ||Default: internally used as USB HOST pwr
|-
| 36||B15||ENET2_TX_EN||ENET2_TX_EN / UART8_RX / SPI4_MOSIECSPI4_MOSI || Output || IO_3.3V ||Default: internally used as USB HOST over current
|-
| 38||D17||ENET2_TX_CLK||ENET2_TX_CLK UART8_CTS_B / UART8_CTS ECSPI4_MISO / SPI4_MISO / USB_OTG2_IDANATOP_OTG2_ID|| Output || IO_3.3V ||Default: internally used as UART8_CTS on MPUART0
|-
| 40||D16||ENET2_RX_ER||ENET2_RX_ER UART8_RTS_B / UART8_RTS / SPI4_SS0ECSPI4_SS0 || Input || IO_3.3V ||Default: internally used as UART8_RTS on MPUART0
|-
| 42||-||DGND||Ground|| || IO_3.3V ||-
|-
| 44||L16||GPIO1_IO07||GPIO ENET2_MDC / ENET2_MDIO / ADCADC1_IN7 || Input/Output || IO_3.3V ||Default: Internally used as ENET1_MDIOENET1_MDC
|-
| 46||K17||GPIO1_IO06||GPIO ENET2_MDIO / ENET2_MDC / ADCADC1_IN6 || Input/Output || IO_3.3V ||Default: Internally used as ENET1_MDCENET1_MDIO
|-
| 48||M17||GPIO1_IO05||GPIO / UART5_RX / ADCADC1_IN5 || Input/Output || IO_3.3V ||-
|-
| 50||M16||GPIO1_IO04||GPIO / UART5_TX / TSCX+ TSC(xpul) / ADCADC1_IN4 || Input/Output || IO_3.3V ||-
|-
| 52||L17||GPIO1_IO03||GPIO TSC(xnur) / TSCX- / ADCADC1_IN3 || Input/Output || IO_3.3V ||-
|-
| 54||L14||GPIO1_IO02||GPIO TSC(ypll) / TSCY+ / ADCADC1_IN2 || Input/Output || IO_3.3V ||-
|-
| 56||L15||GPIO1_IO01||GPIO TSC(ynlr) / TSCY- / ADCADC1_IN1 || Input/Output || IO_3.3V ||-
|-
| 58||K13||GPIO1_IO00||GPIO TSC(wiper) / TSC_WIPER / ADCADC1_IN0 || Input/Output || IO_3.3V ||Default: internally used as USB OTG ID
|-
| 60||-||DGND||Ground|| || ||-
[2] This signal can be routed here instead of connector J48. Please refer to the [mailto:sales@dave.eu Sale Deparment] for more details.
[3] LCD_DATAx signals act as bootstrap configuration pins as well. They can be used by application software freely and they can be connected to user's application circuitry. However, '''any electrical interference during the processor reset cycle must be avoided'''. Please see [[#Handling bootstrap signals|Handling bootstrap signals]] section for more details.
==DWM WiFi/Bluetooth module connector (J46)==
[[File:SBC Lynx-J46.png|thumb|center|300px|J46]]
J46 is a 30-pins SlimStack™ Receptacle 0.50mm pitch that allows to connect to DAVE Embedded Systems' DWM Wifi/BT module.
The following table reports the connector's pinout:
| 12, 14, 16, 18, 20, 22||-||NC||-|| || ||-
|-
| 7||F3||WIFI_CMD||WIFI_CMD / uSDHC2_CMDUSDHC2_CMD || Output || IO_3.3V ||-
|-
| 8||F2||WIFI_CLK||WIFI_CLK / uSDHC2_CLKUSDHC2_CLK || Output || IO_3.3V ||-
|-
| 11||E4||WIFI_DATA0||WIFI_DATA0 / uSDHC2_DATA0USDHC2_DATA0 || Input/Output || IO_3.3V ||-
|-
| 13||E3||WIFI_DATA1||WIFI_DATA1 / uSDHC2_DATA1USDHC2_DATA1 || Input/Output || IO_3.3V ||-
|-
| 15||E2||WIFI_DATA2||WIFI_DATA2 / uSDHC2_DATA2USDHC2_DATA2 || Input/Output || IO_3.3V ||-
|-
| 17||E1||WIFI_DATA3||WIFI_DATA3 / uSDHC2_DATA3USDHC2_DATA3 || Input/Output || IO_3.3V ||-
|-
| 21||J16||BT_UART_RX||BT_UART_RX / UART2_RX_DATA|| Input || IO_3.3V ||-
|-
| 23||H14||BT_UART_CTS||BT_UART_CTS / UART2_nRTSUART2_CTS_B || Input || IO_3.3V ||-
|-
| 24||R9||TIWI_BT_F5||TIWI_BT_F5 / DWM_BT_F5 GPIO3_IO23 || Input || IO_3.3V ||-
|-
| 25||J17||BT_UART_TX||BT_UART_TX / UART2_TX_DATA|| Output || IO_3.3V ||-
|-
| 26||R10||TIWI_BT_F2||TIWI_BT_F2 / DWM_BT_F2GPIO3_IO24 || Output || IO_3.3V ||-
|-
| 27||J15||BT_UART_RTS||BT_UART_RTS / UART2_nCTSUART2_RTS_B || Output || IO_3.3V ||-
|-
| 28||P10||TIWI_IRQ||TIWI_IRQ / 3V3_WLAN_IRQGPIO5_IO04 || Input || IO_3.3V ||-
|-
| 29||N10||TIWI_BT_EN||TIWI_BT_EN / 3V3_BT_ENSNVS_TAMPER7 || Output || IO_3.3V ||Internally used for CB_Configid-
|-
| 30||P9||TIWI_EN||TIWI_EN / 3V3_WLAN_ENGPIO5_IO03 || Output || IO_3.3V ||-
|-
|}
==Multiprotocol UARTs and CAN interfaces==
There are two UART multiprotocol ports (RS232 / RS485 / RS422) and one CAN interface available on SBC LYNX. They are detailed described in the same section because they share some resources. Please refer to [[#Introduction|this section]] for more details about allowable combinations.
===Multiprotocol UARTs===
Multiprotocol UARTs are named as MPUART0 and MPUART1. They are associated to i.MX6UL's native UART8 and UART3 respectively. They are routed to connectors through Intersil ISL3330 transceivers (one for each port).
{|class="wikitable" style="text-align: center;"
! rowspan="3" style="text-align: center; font-weight: bold;" | P/Nand image
! colspan="5" style="text-align: center; font-weight: bold;" | MPUART0
! colspan="5" style="text-align: center; font-weight: bold;" | MPUART1
| style="text-align: center; font-weight: bold;" | Type
|-
| style="text-align: center;" | XUBx0xxxxx[[File:SBC Lynx-top.png|thumb|center|100px|XUBx0xxxxx ]]
| style="text-align: center;" | J34
| style="text-align: center;" | Right-angle male DB9
| style="text-align: center;" | UART8
| style="text-align: center;" | aaaSee [[#RS232 on DB9 (J34, J21)|this section]].
| style="text-align: center;" | RS232
| style="text-align: center;" | J21
| style="text-align: center;" | Right-angle male DB9
| style="text-align: center;" | UART3
| style="text-align: center;" | cccSee [[#RS232 on DB9 (J34, J21)|this section]].
| style="text-align: center;" | RS485
|-
| style="text-align: center;" | XUBx1xxxxx[[File:SXUBx1xxx.png|thumb|center|100px|XUBx1xxxxx ]]
| style="text-align: center;" | J38
| style="text-align: center;" | Phoenix 1755749 MSTBVA2.5/3-G5.08
| style="text-align: center;" | UART8
| style="text-align: center;" | bbbSee [[#RS485 on Phoenix 1755749 MSTBVA2.5/3-G5.08 (vertical; J38, J39)|this section]].
| style="text-align: center;" | RS485
| style="text-align: center;" | not populated
| 8||-||MPUART0_485/232#||Protocol Selection|| || ||Fixed with Pull UP/DOWN resistor
|-
| 9||N9||MPUART0_DEN||Driver Output Enable|| Output || IO_3.3V ||-
|-
| 12||R6||MPUART0_RXEN||Receiver Output Enable|| Output || IO_3.3V ||-
|-
| 13||F5||MPUART0_ON||RS232 Charge Pump Enable|| Output || IO_3.3V ||-
|-
| 14||D16||MPUART0_nRTS||-UART8_RTS_B || Output || IO_3.3V ||-
|-
| 15||C14||MPUART0_TX_DATA||-UART8_TX || Output || IO_3.3V ||-
|-
| 16||D17||MPUART0_nCTS||-UART8_CTS_B || Input || IO_3.3V ||-
|-
| 17||B14||MPUART0_RX_DATA||-UART8_RX || Input || IO_3.3V ||-
|-
|}
| 8||-||MPUART1_485/232#||Protocol Selection|| || ||Fixed with Pull UP/DOWN resistor
|-
| 9||N8||MPUART1_DEN||Driver Output Enable|| Output || IO_3.3V ||-
|-
| 12||N11||MPUART1_RXEN||Receiver Output Enable|| Output || IO_3.3V ||-
|-
| 13||E5||MPUART1_ON||RS232 Charge Pump Enable|| Output|| IO_3.3V ||-
|-
| 14||G14||MPUART1_nRTS||-UART3_RTS_B || Output || IO_3.3V ||-
|-
| 15||H17||MPUART1_TX_DATA||-UART3_TX_DATA || Output || IO_3.3V ||-
|-
| 16||H15||MPUART1_nCTS||-UART3_CTS_B || Input || IO_3.3V ||-
|-
| 17||H16||MPUART1_RX_DATA||-UART3_RX_DATA || Input || IO_3.3V ||-
|-
|}
!Notes
|-
| 1||H15||CAN_D||Transmit data input|| Input || IO_3.3V ||Alternative to MPUART1_nCTS
|-
| 4||G14||CAN_R||Receive data output|| Output || IO_3.3V ||Alternative to MPUART1_nRTS
|-
|}
====Connector's pinout====
The following sections detail connectcors' pinout for the supported configuration. In case RS422 or RS485 configurations are used, termination options are selectable by acting on S12 switches, as described in [[Multiprotocol UARTs settings (S12)|this section]].
=====RS232 on DB9 (J34, J21)=====
{| class="wikitable" | width="100%"
|[[File:SBC Lynx-J34.png|thumb|center|300px|J34]]
|[[File:SBC Lynx-J21.png|thumb|center|300px|J21]]
|}
{|class="wikitable" style="text-align: center;"
|+MPUART0J34
|-
!Pin #
!Internal connection
!Notes
|-
{|class="wikitable" style="text-align: center;"
|+MPUART1J21
|-
!Pin #
!Internal connection
!Notes
|-
|-
|}
=====RS422 on DB9 (J34, J21)=====
{|class="wikitable" style="text-align: center;"
|+MPUART0J34
|-
!Pin #
!Internal connection
!Notes
|-
{|class="wikitable" style="text-align: center;"
|+MPUART1J21
|-
!Pin #
!Internal connection
!Notes
|-
|}
=====RS485 on DB9 (J34, J21)=====
{|class="wikitable" style="text-align: center;"
|+MPUART0J34
|-
!Pin #
!Internal connection
!Notes
|-
{|class="wikitable" style="text-align: center;"
|+MPUART1J21
|-
!Pin #
!Internal connection
!Notes
|-
|-
|}
=====RS232 on Phoenix 1755749 MSTBVA2.5/3-G5.08 (vertical; J38, J29J39)===== {| class="wikitable outercollapse" | width="100%"|[[File:SBC Lynx-J38.png|thumb|center|300px|J38]]|[[File:SBC Lynx-J39.png|thumb|center|300px|J39]]|}
{|class="wikitable" style="text-align: center;"
|+MPUART0J38
|-
!Pin #
!Internal connection
!Notes
|-
{|class="wikitable" style="text-align: center;"
|+MPUART1J39
|-
!Pin #
!Internal connection
!Notes
|-
|-
|}
=====RS232 on Phoenix 1757255 MSTBVA2.5/3-G5.08 (right-angle; J38, J29J39)=====
{|class="wikitable" style="text-align: center;"
|+MPUART0J38
|-
!Pin #
!Internal connection
!Notes
|-
{|class="wikitable" style="text-align: center;"
|+MPUART1J39
|-
!Pin #
!Internal connection
!Notes
|-
|}
=====RS485 on Phoenix 1755749 MSTBVA2.5/3-G5.08 (vertical; J38, J29J39)=====
{|class="wikitable" style="text-align: center;"
|+MPUART0J38
|-
!Pin #
!Internal connection
!Notes
|-
{|class="wikitable" style="text-align: center;"
|+MPUART1J39
|-
!Pin #
!Internal connection
!Notes
|-
|-
|}
=====RS485 on Phoenix 1757255 MSTBVA2.5/3-G5.08 (right-angle; J38, J29J39)=====
{|class="wikitable" style="text-align: center;"
|+MPUART0J38
|-
!Pin #
!Internal connection
!Notes
|-
{|class="wikitable" style="text-align: center;"
|+MPUART1J39
|-
!Pin #
!Internal connection
!Notes
|-
====Additional options for RS422 and RS485 interfaces====
Other options are available on request, as described in the following sections. For more information, please contact [mailto:sales@dave.eu Sales department].
=====TerminationsFail-safe resistors=====TBD=====On request, it is possible to populate fail-safe resistors on RS422/RS485 alternative pinout=====TBDdifferential signals. For more information, please contact [mailto:sales@dave.eu Sales department].
=====RS485 alternative pinout for DB9 connector===== [[File:SBC Lynx-J21.png|thumb|center|300px|J21]] On request, it is possible to implement the following pinout.{|class="wikitable" style="text-align: center;"|+MPUART0|-!Pin #!Internal connection!Signal name!Notes|-| 1||not connected||n/a|||-| 2||MPUARTx_B, MPUARTx_Z||Non-inverting receiver input, non-inverting driver output|||-| 3||not connected||n/a|||-| 4||not connected||n/a|||-| 5||DGND||Ground|||-| 6||not connected||n/a|||-| 7||not connected||n/a|||-| 8||MPUARTx_A, MPUARTx_Y||Inverting receiver input, inverting driver output|||-| 9||not connected||n/a|||-| SH1, SH2||PCB_GND_RNG||[[Grounding_(SBC_Lynx)|Shield]]|||-|} ===CAN(J40 or J21)=== {| class="wikitable outercollapse" | width="100%"|[[File:SBC Lynx-J40.png|thumb|center|300px|J40]]|[[File:SBC Lynx-J21.png|thumb|center|300px|J21]]|} CAN interface is connected associated to the i.MX6UL Flexcan1 's FLEXCAN1 controller through an . Transceiver is Texas Instruments SN65HVD23x . There are two mutually exclusive moounting options available for CAN transceiverbus:*J40 (3-pin shrouded header)*J21 (DB9).If J21 is selected, MPUART1 is not available and the connector's pinout is the one detailed in the following table.{|class="wikitable" style="text-align: center;"|+CAN interface on J21|-!Pin #!Internal connection!Signal name!Notes|-| 1||not connected||n/a|||-| 2||Dominant low||CAN_M|||-| 3||Ground||CAN_GND|||-| 4||not connected||n/a|||-| 5||Shield||CAN_SHIELD|||-| 6||not connected||n/a|||-| 7||Dominant high||CAN_P|||-| 8||not connected||n/a|||-| 9||not connected||n/a|||-| SH1, SH2||PCB_GND_RNG||[[Grounding_(SBC_Lynx)|Shield]]|||-|} J40 is a 0.200-inch pitch 3-pin shrouded header (Phoenix 1755749 MSTBVA2.5/3-G5.08). Please refer to the following table for the detailed pinout.{|class="wikitable" style="text-align: center;"|+CAN interface on J40|-!Pin #!Internal connection!Signal name!Notes|-| 1||Dominant high||CAN_P|||-| 2||Dominant low||CAN_M|||-| 3||Ground||DGND|||-| 4||PCB_GND_RNG||[[Grounding_(SBC_Lynx)|Guard ring]]|||}
==CPU ONOFF / Power reset connector (J50)==
[[File:SBC Lynx-J50.png|thumb|center|300px|J50]]
J50 is a 0.100in-pitch 4-pin male header that allows connection to signals needed to implement advanced power modes.
=Buttons=
==Reset button (S11)==
[[File:SBC Lynx-S11.png|thumb|center|300px|S11]]
When pressed, a full power-up cycle is triggered, resulting in a complete hardware reset of the system.
=Switches=
==Boot mode (S12)==
[[File:SBC Lynx-S12.png|thumb|center|300px|S12]]
Please refer to [[Booting_options_(SBC_Lynx)|this page]].
==Multiprotocol UARTs settings (S12)==
===RS422 configuration===
| rowspan="2" style="text-align: center;" | 3
| style="text-align: center;" | on
| TBDConnect 120 Ohm termination for transmitter pair
|-
| style="text-align: center;" | off
| TBDDisconnect any termination for transmitter pair
|-
| rowspan="2" style="text-align: center;" | 4
| style="text-align: center;" | on
| TBDConnect 120 Ohm termination for receiver pair
|-
| style="text-align: center;" | off
| TBDDisconnect any termination for receiver pair
|}
| rowspan="2" style="text-align: center;" | 5
| style="text-align: center;" | on
| TBDConnect 120 Ohm termination for transmitter pair
|-
| style="text-align: center;" | off
| TBDDisconnect any termination for transmitter pair
|-
| rowspan="2" style="text-align: center;" | 6
| style="text-align: center;" | on
| TBDConnect 120 Ohm termination for receiver pair
|-
| style="text-align: center;" | off
| TBDDisconnect any termination for receiver pair
|}
===RS485 configuration===
{| class="wikitable" style="text-align: center;"
| rowspan="2" style="text-align: center;" | 3
| style="text-align: center;" | on
| TBD120R Termination for Bidirectional Differential Pair
|-
| style="text-align: center;" | off
| TBDNo Termination for Bidirectional Differential Pair
|-
| rowspan="2" style="text-align: center;" | 4
| style="text-align: center;" | on
| TBDN.C.
|-
| style="text-align: center;" | off
| TBDN.C.
|}
| rowspan="2" style="text-align: center;" | 5
| style="text-align: center;" | on
| TBD120R Termination for Bidirectional Differential Pair
|-
| style="text-align: center;" | off
| TBDNo Termination for Bidirectional Differential Pair
|-
| rowspan="2" style="text-align: center;" | 6
| style="text-align: center;" | on
| TBDN.C.
|-
| style="text-align: center;" | off
| TBDN.C.
|}
==CAN bus settings (S12)==