{{ImportantMessage|text=SBC Lynx is extremely flexible in terms of hardware configurations. This document details connector's pinout of common SBC Lynx models. For more information about models not documented here, please contact [mailto:sales@dave.eu Sales department].}}
==Introduction==This document details connectors, pinouts buttons and switches that equip SBC Lynx board. '''Please note that not all of them are available on all models'''.
For some connectors, information related to the internal connections to the processor are provided. In these cases, 14x14mm-package processor's balls references are indicated. The following table lists connectors , buttons and switches available on SBC Lynx.
|3||-||IO_3.3V||UART1 I/O voltage reference||Voltage reference||IO_3.3V||-
|-
|4||-||DGND||Ground||-||-||-
|}
J42 connector is compatible with [http://www.ftdichip.com/Support/Documents/DataSheets/Cables/DS_TTL-232RG_CABLES.pdf FTDI TTL-232RG-VIP-WE cable]. To connect it, please use this wiring:
*J42.1: yellow wire
*J42.2: orange wire
*J42.3: red wire
*J42.4: black wire
==Ethernet connector (J16)==
[[File:SBC Lynx-J16.png|thumb|center|300px|J16]]
J16 is a standard RJ45 10/100BaseT Ethernet connector - incorporating magnetics - connected to the Ethernet controller and PHY.
J16 integrates a green status LED providing connection information:
*LED on: link established
*LED blinking: activity.
The following table describes the interface signals:
{|class="wikitable" style="text-align: center;"
|-
!Pin #
!Name
!Function
!Notes
|-
|1||TDP||TX+||
|-
|2||TCT||TX center tap||
|-
|3||TDN||TX-||
|-
|4||RDP||RX+||
|-
|5||RCT||RX center tap||
|-
|6||RDN||RX-||
|-
|7||NC||Not connected||
|-
|8||CHS_GND||Chassis ground||See also [[Grounding_(SBC_Lynx)|this page]]
|}
==microSD slot (J43)==
[[File:SBC Lynx-J43.png|thumb|center|300px|J43]]
J43 is a push-pull microSD card slot connected to uSDHC1 port of MX6UL processor.
The following table details the pinout:
{|class="wikitable" style="text-align: center;"
|-
!Pin #
!Name
!Function
!Notes
|-
|1||DAT2||Data line #2||
|-
|2||DAT3||Data line #3||
|-
|3||CMD||Command||
|-
|4||VDD||3.3V||
|-
|5||CLK||Clock||
|-
|6||Vss||Ground||
|-
|7||DAT0||Data line #0||
|-
|8||DAT1||Data line #2||See also [[Grounding_(SBC_Lynx)|this page]]
|-
|9||SD_SHIELD||Metal case||See also [[Grounding_(SBC_Lynx)|this page]]
|-
|10||SD_SHIELD||Metal case||See also [[Grounding_(SBC_Lynx)|this page]]
|-
|11||SD_SHIELD||Metal case||See also [[Grounding_(SBC_Lynx)|this page]]
|-
|12||Vss||Ground||
|-
|13||CD||Card detect||Pulled-up to 3.3V
|}
==USB host port (J48)==
[[File:SBC Lynx-J48.png|thumb|center|300px|J48]]
J48 is a standard USB Type A right angle connector connected to the MX6UL USB_OTG2 port signals.
The following table reports the connector's pinout:
| [[File:SBCLYNX_ADDON_XUAL Mounted.JPG|thumb|center|300px|Example of mezzanine usability]]
|}
J53 and J54 are 10x1-pin 2.54mm-pitch vertical headers for optional mezzanine expansion boards. These boards can be implemented to extend SBC Lynx functionalities and/or interfaces.
It is worth remembering that some of the mezzanine board connectors signals are reserved for internal use or shared with One Piece connector (J45 / J52). Please contact [mailto:sales@dave.eu Sales department] for more information.
The following tables report the connectors' pinout.
[1] This group of signals can be configured to implement this alternative functions:
*I2C4
*CAN2
*SPI3 (CS0).
[2] Not available is DWM WIFI present
[3] '''This signal acts as bootstrap configuration flag''' and '''may be pulled up or down with 10kOhm resistor'''. '''Do not drive these signals until CPU_PORn is deasserted'''. For more details please refer to [[#Handling bootstrap signals|this section]].
[4] Not available if 24-bit LCD interface is used.
MEZZANINE_GP0, MEZZANINE_GP1 and MEZZANINE_GP2 are connected to LCD_DATA19, LCD_DATA22 and LCD_DATA23 respectively. As such, they act as bootstrap configuration signals as well. They can be used by application software freely and they can be connected to user's application circuitry. However, '''any electrical interference during the processor reset cycle must be avoided'''.
There are different solutions to comply with this requirement. The following image shows a concept solution for this problem.
[[File:SBCLynx-Bootstrap-signals-handling.png|thumb|center|600px|Concept solution to use bootstrap signals]]
During the processor reset cycle, MEZZANINE_GP0, MEZZANINE_GP1 and MEZZANINE_GP2 [1] are isolated from user's application logic by a bus switch that is in high-impedence state. Bus switch's BUS_SW_OE_n signal is connected to another processor's GPIO (GPIO1_IO01 in the example). Before configuring and using MEZZANINE_GPx signals, application software needs to:
*initialize GPIO1_IO01 as GPIO ouput
*set GPIO1_IO01 to logic level 0 in order to enable the switch.
[1] The same considerations apply to all of LCD_DATAx signals that are routed to J45/J52 connectors.
| [[File:SBC-Lynx-onepiece-bottom.png|thumb|center|300px|example of possible connections on J52]]
|}
J45 and J52 are two interfaces designed to be populated with Samtec 1.00mm-pitch 30x2-pin FSI One-piece connectors. The peculiarity of this kind of connectors if the fact that they
*allow to mate two boards by using one connector only
*the connector is mounted on one of the two boards indifferently.
J45 and J52 that share the same pinout, however they are intended to be used for different goals. J45 - that is placed on the top side of the PCB - is generally used to mate an optional expansion board. J52 - that is placed on the bottom side of the PCB - is conceived to mate SBC Lynx to a larger carrier board. In this case SBC Lynx can be thought as as an add-on for another board and can be powered via J52 interface itself.
It is worth remembering that some of the J45/J52 signals are reserved for internal use or shared with mezzanine board connectors. Please contact DAVE Embedded Systems' [mailto:sales@dave.eu Sales department] to get more information.
The following tables reports the interfaces' pinout that is the same for J45 and J52:
| 58||K13||GPIO1_IO00|| TSC(wiper) / ADC1_IN0 || Input/Output || IO_3.3V ||Default: internally used as USB OTG ID
|-
| 60||-||DGND||Ground|| || ||-
|-
|}
[1] Please contact the [mailto:sales@dave.eu Sales Deparment] for more details.
[2] This signal can be routed here instead of connector J48. Please refer to the [mailto:sales@dave.eu Sale Deparment] for more details.
[3] LCD_DATAx signals act as bootstrap configuration pins as well. They can be used by application software freely and they can be connected to user's application circuitry. However, '''any electrical interference during the processor reset cycle must be avoided'''. Please see [[#Handling bootstrap signals|Handling bootstrap signals]] section for more details.
==DWM WiFi/Bluetooth module connector (J46)==
[[File:SBC Lynx-J46.png|thumb|center|300px|J46]]
J46 is a 30-pins SlimStack™ Receptacle 0.50mm pitch that allows to connect to DAVE Embedded Systems' DWM Wifi/BT module.
The following table reports the connector's pinout:
There are two UART multiprotocol ports (RS232 / RS485 / RS422) and one CAN interface available on SBC LYNX. They are described in the same section because they share some resources. Please refer to [[#Introduction|this section]] for more details about allowable combinations.
===Multiprotocol UARTs===
Multiprotocol UARTs are named as MPUART0 and MPUART1. They are associated to i.MX6UL's native UART8 and UART3 respectively. They are routed to connectors through Intersil ISL3330 transceivers (one for each port).
Generally speaking, multiprotocol UARTs
*supports RS232, RS485 and RS422 electrical protocols independently (meaning that, for example, MPUART0 can be configured as RS485 and MPUART1 can be configured as RS485)
**electrical protocol is selected by different mounting options
*can be routed to different types of connector independently; supported connectors are:
This wide flexibility allows to implement many different combinations. The following table details two of them. For actual available options, please contact [mailto:sales@dave.eu Sales department].
{|class="wikitable" style="text-align: center;"
! rowspan="3" style="text-align: center; font-weight: bold;" | P/N and image