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J53 and J54 are 10x1-pin 2.54mm-pitch vertical headers for optional mezzanine expansion boards. These boards can be implemented to extend SBC Lynx functionalities and/or interfaces.
It is worth remebering remembering that some of the mezzanine board connectors signals are reserved for internal use or shared with One Piece connector (J45 / J52). Please contact [mailto:sales@dave.eu Sales department] for more information.
The following tables reports report the connectors' pinout. {|class="wikitable" style="text-align:center;"|+J53|-!Pin #!Processor ball!Name!Default function!Default type!Notes|-|1||K14||UART1_TX_DATA||UART1 transmit line||Output, 3.3V LVTTL|||-|2||K16||UART1_RX_DATA||UART1 receive line||Input, 3.3V LVTTL|||-|3||-||IO_3.3V||UART1 I/O voltage reference||3.3V|||-|4||-||DGND||Ground||0V|||-|5||K14||UART1_TX_DATA||UART1 transmit line||Output, 3.3V LVTTL|||-|6||K16||UART1_RX_DATA||UART1 receive line||Input, 3.3V LVTTL|||-|7||-||IO_3.3V||UART1 I/O voltage reference||3.3V|||-|8||-||DGND||Ground||0V|||-|9||-||IO_3.3V||UART1 I/O voltage reference||3.3V|||-|10||-||DGND||Ground||0V|||} {|class="wikitable" style="text-align: center;"|+J54|-!Pin #!Processor ball!Name!Default function!Default type!Notes|-|1||K14||UART1_TX_DATA||UART1 transmit line||Output, 3.3V LVTTL|||-|2||K16||UART1_RX_DATA||UART1 receive line||Input, 3.3V LVTTL|||-|3||-||IO_3.3V||UART1 I/O voltage reference||3.3V|||-|4||-||DGND||Ground||0V|||-|5||K14||UART1_TX_DATA||UART1 transmit line||Output, 3.3V LVTTL|||-|6||K16||UART1_RX_DATA||UART1 receive line||Input, 3.3V LVTTL|||-|7||-||IO_3.3V||UART1 I/O voltage reference||3.3V|||-|8||-||DGND||Ground||0V|||-|9||-||IO_3.3V||UART1 I/O voltage reference||3.3V|||-|10||-||DGND||Ground||0V|||}
TBD
Power_supply_unit_(PSU)_and_voltage_domains_(SBC_Lynx)
===One-piece interfaces (J45 / J52)===