BORA Xpress XILINX Zynq CPU module[edit | edit source]
BORA Xpress is the top-class Dual Cortex-A9 + FPGA CPU module by DAVE Embedded Systems, based on the recent Xilinx "Zynq" XC7Z015 / XC7Z030 application processor. BORA Xpress offers great computational power, thanks to the rich set of peripherals, the Dual Cortex-A9 and the Artix-7 FPGA inside. BORA Xpress is designed in order to keep full compatibility with the ULTRA Line CPU modules, to guarantee the premium quality and technical value of those customers that require top performances.
Main Features[edit | edit source]
- Unmatched performance thanks to Dual ARM Cortex-A9 @ up to 1GHz
- SERDES: Xpress lanes up to 6.25 Gbps
- All memories you need: on-board NOR and NAND Flash
- Enabling smarter system thanks to Artix-7 or Kintex-7 FPGA integrated on-chip
- FPGA banks wide range PSU input from 1.2V to 3.3V
- Highest security and reliability: internal voltage monitoring and power good enable
- Reduced carrier complexity: dual CAN, USB, Ethernet GB and native 3.3 V I/O
- Easy to fit thanks to its small form factor
- Accurate timing application thanks to on-board 5ppm RTC
- Pin2Pin Compatibility with BORA SOM based on Zynq XC7Z010/XC7Z020
For detailed information about BORA Xpress, please refer to the BORA Xpress SOM article.
BORA RSS Feed[edit | edit source]
Please subscribe to the Bora Pages Updates RSS Feed using your favourite RSS reader to be notified on wiki pages updates related to BORA.
Please refer to the Keeping updated on DAVE Embedded Systems Developer's wiki pages modifications section for further information on how to subscribe to the RSS feed.
BORA Xpress Product Page[edit | edit source]
Please visit BORA Xpress Web Page for more product information.
BORA Xpress Leaflet[edit | edit source]
Please download the latest leaflet of BORA Xpress from the following link:
BORA Xpress Evaluation Kit[edit | edit source]
BORA Evaluation Kit BELK is a development/test board designed to start working with the BORA Xpress platform and experimenting with the implemented features. The carrier board hosts an BORA Xpress CPU module and offers the following features:
- 10/100/1000 Ethernet #0 (PS)
- 10/100/1000 Ethernet #1 (Routed through EMIO)
- 1x USB 2.0 OTG (MicroAB connector)
- 1x Serial port (RS232 DB9)
- 1x MicroSD
- External DDR3 SDRAM bank
- This memory bank is connected to bank 35 - powered @ 1.5V - that is optimized at PCB level to interface such devices.
- This bank is expressly available for peripherals and/or IPs implemented in FPGA fabric. This solution permits these blocks to work without impacting on Bora's DDR3 memory bandwidth. To access this bank, MIG (Memory Interface Generator) controller has to be implemented on PL.
- MIG controller requires an external 200 MHz clock source.
- State-of-the-art programmable MEMS clock generator (Silicon Labs Si504): this is an alternative clock source to allow the user to easily experiment his/her own peripherals and IPs on FPGA
- Some signals of Bank 35 can be configured as XADC signals. For this reason they can be routed alternatively to 2.54mm-pitch connectors, instead of DDR3 memory.
- JTAG port
- Trace port
- Socket for DWM Wireless Module
- Digilent Pmod™ Compatible expansion connectors
- Headers for external for NAND flash and SPI NOR flash
- 2.54mm-pitch pin-strip connectors for Bora PS and PL configurable peripherals (MIO and EMIO interfaces, GPIOs, custom IPs, ..)
- Jumpers for voltage selection of the PL banks
- +12V power connector
Linux Evaluation Kit[edit | edit source]
Please refer to this page for more details.
BORA Xpress technical details[edit | edit source]
Block diagram[edit | edit source]
The following picture shows a simplified block diagram of BORA Xpress module.
Pages in category "BoraX"
The following 57 pages are in this category, out of 57 total.
- BELK-AN-001: Asymmetric Multiprocessing (AMP) on Bora – Linux FreeRTOS
- BELK-AN-004: Interfacing BoraEVB/BoraXEVB to TFT LCD display
- BELK-AN-006: Enabling dual Gigabit Ethernet support on BoraEVB/BoraXEVB
- BELK-AN-007: Asymmetric Multiprocessing (AMP) on Bora/BoraX with OpenAMP
- BELK-AN-008: Programming the FPGA Bitstream with U-Boot
- BELK-AN-009: Using Visual Studio Code for remote debugging
- BELK-TN-001: Real-timeness, system integrity and TrustZone® technology on AMP configuration
- BELK-TN-003: Video processing and hardware/software partitioning
- BELK-TN-004: Managing both Ethernet ports with U-Boot (BoraEVB/BoraXEVB)
- BELK-TN-005: Running PYNQ on Bora
- BELK-TN-006: Using PetaLinux to Build BELK/BXELK Software Components
- BELK-TN-007: FreeRTOS on single-core Bora Lite SoM
- BELK-TN-008: Integrating Visual Studio Code and Lauterbach PowerView TRACE32
- BELK-TN-009: Integrating Visual Studio Code with a cross-toolchain
- BELK-TN-010: MAC address programming on OTP
- BELK-TN-011: Lock OTP Areas
- BELK/BXELK Quick Start Guide
- BELK/BXELK software components
- Booting Linux Kernel
- Booting the system via NFS (BELK/BXELK)
- BORA Xpress SOM
- BoraX Embedded Linux Kit (BXELK)
- Build system (BELK/BXELK)
- Building Linux kernel (BELK/BXELK)
- Building the Yocto BSP (BELK/BXELK)
- Building U-Boot (BELK/BXELK)
- BXELK-TN-002: Non-intrusive continuous multi-gigabit transceivers link monitoring
- BXELK-TN-003: Video streams integrity verification for Automated Test Equipments (ATE)