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= BORA Lite Xilinx ZYNQ XCZ007S/12SXC7Z007S/14S / or XC7Z010 / XC7Z020 020 SOM module =
[[File:BORALite-TOP.png|200px|frameless|border|left]]
[https://www.dave.eu/products/som/xilinx/zynq-XC7Z010-XC7Z020_bora BORA Lite] is the updated version of BORA SOM in a more compact and convenient form factor SODIMM DDR3 204pins.
This new top-class Single/Dual Cortex-A9 + FPGA CPU module by DAVE Embedded Systems is based on the recent Xilinx Zynq XC7Z007S/012S/014S or XC7Z010/XC7Z020 020 application processor.
Thanks to BORA Lite, customers are going to save time and resources by using a compact solution that includes both a CPU and an FPGA, avoiding complexities on the carrier PCB. Additionally, thanks to SODIMM form factor this solution represent the cheapest way to integrate a Zynq SOC in an embedded design.
| align="center" style="background:#f0f0f0;"|'''Options'''
|-
| CPU||Xilinx Single/Dual ARM Cortex-A9<br>ZYNQ XC7Z007S/012S014S 014S or XC7Z010/ZC7Z020 @ 800MHz ||
|-
| Cache||L1: 32Kbyte instruction, 32Kbyte data<br>L2: 512Kbyte for each core ||
{| class="wikitable mw-collapsible mw-collapsed"
! colspan="3" style="text-align:left" | Electrical, mechanical and environmentale PL specifications
|-
| align="center" style="background:#f0f0f0;"|'''Feature'''
| Active power consumption|| Please refer to [[Hardware_Manual_(BoraLite)#Power_consumption | Power consumption]] section||
|-
| Dimensions||67,5mm 6mm x 45mm43,2mm||
|-
| Weight|| ||
| '''Electrical Schematics'''
|
* [[Hardware Manual Design_Overview_(BoraLite)| Design Overview]]* [[Reset scheme Processing_system_peripherals_(BoraLite) | Processing System (PS) pheripherals]]* [[Programmable_logic_(BoraLite) | Programmable Logic (PL) ]]* [[Reset_scheme_(Bora/BoraLite)| Reset Block Diagram]]
* [[RTC (Bora)|On board RTC specifications]]
* [[Pinout (BoraLite)|BORA Electrical pinout]]
|
* [https://www.dave.eu/sites/default/files/files/boraLite.dxf.zip BORA 2D Mechanical Drawing (DXF format)]
* [https://www.dave.eu/sites/defaultsystem/files/filesarea-riservata/boraLite_stp.zip BORA 3D Mechanical Drawing (STEP format)]
|'''Carrier Board design'''
|
* [[Carrier_board_design_guidelines_(SOM) | General carrier board design guidelines]]
* [[Integration guide Integration_guide_(Bora/BoraX/BoraLite)|BORA Lite specific integration guidelines]]* [[Physical_devices_mapping_(BELK/BXELK) | Device mapping (Evaluation Kit BELK/BXELK)]]
| '''Thermal & Power Management
|'''
* [[Thermal_management_guidelines | Thermal management guidelines]]
* [[Power_consumption_(BoraBoraLite)|Power consumption benchmarks]]* [[Power Power_(Bora/BoraLite)|Power management guidelines]]
|}
| '''Bootloader'''
|
* [[Bora_Embedded_Linux_Kit_BoraLite_Embedded_Linux_Kit_(BELK)#BELK_software_components | U-boot releases]]* [[System_boot_and_recovery_via_microSD_card_(BELK) | BORA Lite Booting options]]
* [[Change_Linux_Command_Line_Parameter_from_U-boot | How to modify Linux parameters in U-Boot]]
| '''Linux'''
|
* [[Bora_Embedded_Linux_Kit_BoraLite_Embedded_Linux_Kit_(BELK)#BELK_software_components | Linux releases]]
* [[Booting_Linux_Kernel | How to boot Linux on DAVE Embedded Systems' SOMs]]
* [[Bora_Embedded_Linux_Kit_BoraLite_Embedded_Linux_Kit_(BELK) | DAVE Embedded Systems' Linux Kit]]
* [[BELK/BXELK_Quick_Start_Guide | Embedded Linux Kit Quick Start Guide]]
| '''Vivado'''
|
* [[Programmable_logic_(BoraBoraLite) | BORA Lite SOM's programmable logic PL]]
* [[Creating_and_building_example_Vivado_project_(BELK) | A project example in Vivado]]
|}
