Difference between revisions of "Category:Bora"

From DAVE Developer's Wiki
Jump to: navigation, search
m (→‎Dido Product Page)
(→‎Hardware Documentation)
(25 intermediate revisions by 4 users not shown)
Line 1: Line 1:
−
= Bora Xilinx ZYNQ XC7Z010/XC7Z020 CPU module =
+
<div style="clear:right; margin-bottom: .5em; float: right; padding: .5em 0 .8em 1.4em; background: none;">
 +
__TOC__
 +
</div>
  
−
[[File:Bora5-small.jpg|200px|frameless|border]]
+
= BORA Xilinx ZYNQ XC7Z010/XC7Z020 CPU module =
  
−
Bora is the new top-class Dual Cortex-A9 + FPGA CPU module by DAVE, based on the recent [http://www.xilinx.com/content/xilinx/en/products/silicon-devices/soc/zynq-7000.html Xilinx Zynq XC7Z010/XC7Z020 application processor]. Thanks to Bora, customers are going to save time and resources by using a compact solution that includes both a CPU and an FPGA, avoiding complexities on the carrier PCB.
+
[[File:Bora5-small.jpg|200px|frameless|border|left]]
  
−
Bora is designed and manufactured according to DAVE's ''Ultra'' Line specifi cations, in order to guarantee premium quality and technical value for customers who require top performances and flexibility.
+
[http://www.dave.eu/products/zynq-bora BORA] is the new top-class Dual Cortex-A9 + FPGA CPU module by '''DAVE Embedded Systems''', based on the recent [http://www.xilinx.com/content/xilinx/en/products/silicon-devices/soc/zynq-7000.html Xilinx Zynq XC7Z010/XC7Z020 application processor]. Thanks to BORA, customers are going to save time and resources by using a compact solution that includes both a CPU and an FPGA, avoiding complexities on the carrier PCB.
 +
 
 +
BORA is designed and manufactured according to '''DAVE Embedded Systems''' ''Ultra'' Line specifications, in order to guarantee premium quality and technical value for customers who require top performances and flexibility.
 +
 
 +
The [[Hardware Manual (Bora)]] provides detailed information about hardware interfaces and characteristics. This document will provide a functional overview of the module and will focus on system-related issues.
 +
 
 +
Please visit [http://www.dave.eu/products/som/xilinx/zynq-XC7Z010-XC7Z020_bora BORA Web Page] for more product information.
  
 
== Main Features ==
 
== Main Features ==
  
−
* Dual ARM Cortex-A9 @ 800 MHz
+
* Unmatched performance thanks to dual ARM Cortex-A9 @ 800 MHz
 
* Up to 1 GB DDR3 SDRAM
 
* Up to 1 GB DDR3 SDRAM
−
* Flash NOR and Flash NAND on board
+
* All memories you need: on-board NOR and NAND Flash
−
* Artix-7 FPGA integrated on chip
+
* Enabling smarter system thanks to Artix-7 FPGA integrated on chip
 
* FPGA banks with Wide range of PSU input (from 1.2V to 3.3V)
 
* FPGA banks with Wide range of PSU input (from 1.2V to 3.3V)
 +
* Highest security and reliability: internal voltage monitoring and power good enable
 +
* Reduced carrier complexity: DUAL CAN, USB, Ethernet GB and native 3.3V I/O
 
* Dual-CAN controller
 
* Dual-CAN controller
−
* Fast Ethernet LAN and additional RMII
+
* Gigabit Ethernet LAN and additional GMII/MII interface
−
* 2 x USB OTG
+
* Up to 2x USB OTG
−
* 2x UART, 6x I²C, 6x SPI
+
* Up to 2x UART
−
* Small form factor: 85mm x 50mm
+
* Up to 2x I²C
 +
* Up to 2x SPI
 +
* Precise timing application thanks to on-board 5ppm RTC
 +
* Easy to fi t thanks to its Small form factor: 85mm x 50mm
 
* Industrial (-40/+85°C) operating temperature range
 
* Industrial (-40/+85°C) operating temperature range
  
−
For detailed information about Bora, please refer to the [[Bora SOM]] article.
 
  
−
== Bora RSS Feed ==
+
== BORA technical specification ==
 +
{| class="wikitable outercollapse" | width="100%"
 +
|
 +
{| class="wikitable mw-collapsible mw-collapsed"
 +
! colspan="3" style="text-align:left" | CPU and Memories
 +
|-
 +
| align="center" style="background:#f0f0f0;"|'''Feature'''
 +
| align="center" style="background:#f0f0f0;"|'''Specifications'''
 +
| align="center" style="background:#f0f0f0;"|'''Options'''
 +
|-
 +
| CPU||Xilinx Dual ARM Cortex-A9<br>ZYNQ XC7Z010/ZC7Z020 @ 800MHz ||
 +
|-
 +
| Cache||L1: 32Kbyte instruction, 32Kbyte data<br>L2: 512Kbyte for each core ||
 +
|-
 +
| RAM|| DDR3 SDRAM @ 533 MHz<br>Up to 1 GB ||
 +
|-
 +
| SRAM|| On-chip RAM, 256 KB ||
 +
|-
 +
| Storage||Flash NOR SPI (8, 16 MB)<br>Flash NAND (all sizes, on request - Up to 1GB) ||
 +
|-
 +
|}
 +
 
 +
{| class="wikitable mw-collapsible mw-collapsed"
 +
! colspan="3" style="text-align:left" | Peripherals
 +
|-
 +
| align="center" style="background:#f0f0f0;"|'''Feature'''
 +
| align="center" style="background:#f0f0f0;"|'''Specifications'''
 +
| align="center" style="background:#f0f0f0;"|'''Options'''
 +
|-
 +
| Coprocessors|| NEON™ & Single / Double Precision<br>Floating Point for each processor||
 +
|-
 +
| USB||Up to 2x 2.0 OTG ports ||
 +
|-
 +
| UARTs||Up to 2x UART ports ||
 +
|-
 +
| GPIO||Up to x lines, shared with other functions (interrupts available) ||
 +
|-
 +
| Networks||Ethernet 10/100/1000 Mbps ||
 +
|-
 +
| CAN||2x full CAN 2.0B compliant interfaces ||
 +
|-
 +
| SD/MMC||2x SD/SDIO 2.0/MMC3.31 compliant controllers ||
 +
|-
 +
| Serial buses||2x full-duplex SPI ports with three peripheral chip selects<br>2x master and slave I²C interfaces ||
 +
|-
 +
| Timers||2x triple timers/counters (TTC) ||
 +
|-
 +
| RTC ||On board (DS3232), external battery powered ||
 +
|-
 +
| Debug||JTAG IEEE 1149.1 Test Access Port<br>CoreSight™ and Program Trace Macrocell (PTM) ||
 +
|-
 +
|}
 +
 
 +
{| class="wikitable mw-collapsible mw-collapsed"
 +
! colspan="3" style="text-align:left" | Electrical, mechanical and environmentale spesifications
 +
|-
 +
| align="center" style="background:#f0f0f0;"|'''Feature'''
 +
| align="center" style="background:#f0f0f0;"|'''Specifications'''
 +
| align="center" style="background:#f0f0f0;"|'''Options'''
 +
|-
 +
| FPGA model||Artix™-7||
 +
|-
 +
| Logic cells||28K to 56K||
 +
|-
 +
| LUTs||17K to 53K||
 +
|-
 +
| Flip flops||35K to 100K||
 +
|-
 +
| RAM||240KB to 560KB||
 +
|-
 +
| DSP slices||80 to 220||
 +
|-
 +
| Differential pairs||Up to 34 differential pairs for high freq. interfaces||
 +
|-
 +
|}
 +
 
 +
{| class="wikitable mw-collapsible mw-collapsed"
 +
! colspan="3" style="text-align:left" | Electrical, mechanical and environmentale spesifications
 +
|-
 +
| align="center" style="background:#f0f0f0;"|'''Feature'''
 +
| align="center" style="background:#f0f0f0;"|'''Specifications'''
 +
| align="center" style="background:#f0f0f0;"|'''Options'''
 +
|-
 +
| Supply Voltage||3.3V, on-board voltage regulation||
 +
|-
 +
| Active power consumption|| Please refer to [[Hardware_Manual_(Bora)#Power_consumption | Power consumption]] section||
 +
|-
 +
| Dimensions||85mm x 50mm||
 +
|-
 +
| Weight|| ||
 +
|-
 +
| MTBF|| ||
 +
|-
 +
| Operating temperature||0..70 °C<br>-40..+85 °C||
 +
|-
 +
| Connectors||3 x 140 pins 0.6mm pitch||
 +
|}
 +
| [[File:Bora-bd.png|300px|center]]
 +
|
 +
* [http://www.dave.eu/products/som/xilinx/zynq-XC7Z010-XC7Z020_bora BORA Web Page]
 +
* [http://www.dave.eu/sites/default/files/files/bora-leaflet.pdf BORA leaflet]
 +
* [http://www.dave.eu/sites/default/files/files/bora-bd.pdf BORA Block Diagram]
 +
|}
 +
 
 +
== Hardware Documentation ==
 +
 
 +
{| class="wikitable" |width="100%"
 +
| '''Electrical Schematics'''
 +
|
 +
* [[Hardware Manual (Bora)]]
 +
* [[Reset scheme (Bora)| Reset Block Diagram]]
 +
* [[RTC (Bora)|On board RTC specifications]]
 +
* [[Pinout (Bora)|BORA Electrical pinout]]
 +
| '''Mechanical Documentation'''
 +
|
 +
* [https://www.dave.eu/sites/default/files/files/bora.dxf.zip BORA 2D Mechanical Drawing (DXF format)]
 +
* [https://www.dave.eu/sites/default/files/files/bora_stp.zip BORA 3D Mechanical Drawing (STEP format)]
 +
|'''Carrier Board design'''
 +
|
 +
* [https://www.dave.eu/system/files/area-riservata/boraevb-2.2.0-BELK-dsn.zip Evaluation Board Electrical Schematics]
 +
* [[Carrier_board_design_guidelines_(SOM) | General carrier board design guidelines]]
 +
* [[Integration guide (Bora/BoraX)|BORA specific integration guidelines]]
 +
| '''Thermal & Power Management
 +
|'''
 +
* [[Thermal_management_guidelines | Thermal management guidelines]]
 +
* [[Power_consumption_(Bora)|Power consumption benchmarks]]
 +
* [[Power (Bora)|Power management guidelines]]
 +
|}
 +
 
 +
== Software Documentation ==
  
−
Please subscribe to the <newsfeedlink feed="Bora Pages Updates" format="rss">Bora Pages Updates</newsfeedlink> RSS Feed using your favourite RSS reader to be notified on '''wiki pages updates related to Diva'''.
+
{| class="wikitable" | width="100%"
 +
| '''Bootloader'''
 +
|
 +
* [[Bora_Embedded_Linux_Kit_(BELK)#BELK_software_components | U-boot releases]]
 +
* [[System_boot_and_recovery_via_microSD_card_(BELK) | BORA Booting options]]
 +
* [[Change_Linux_Command_Line_Parameter_from_U-boot | How to modify Linux parameters in U-Boot]]
 +
| '''Linux'''
 +
|
 +
* [[Bora_Embedded_Linux_Kit_(BELK)#BELK_software_components | Linux releases]]
 +
* [[Booting_Linux_Kernel | How to boot Linux on DAVE Embedded Systems' SOMs]]
 +
* [[Bora_Embedded_Linux_Kit_(BELK) | DAVE Embedded Systems' Linux Kit]]
 +
* [[BELK/BXELK_Quick_Start_Guide | Embedded Linux Kit Quick Start Guide]]
 +
| '''Vivado'''
 +
|
 +
* [[Programmable_logic_(Bora) | BORA SOM's programmable logic PL]]
 +
* [[Creating_and_building_example_Vivado_project_(BELK) | A project example in Vivado]]
 +
|}
  
−
Please refer to the [[Dave_Developer's_Wiki_Conventions#Keeping_updated_on_Dave_Developer.27s_wiki_pages.27_modifications | Keeping updated on Dave Developer's wiki pages modifications]] section for further information on how to subscribe to the RSS feed.
+
= BORA Evaluation Kit =
  
−
== Bora Product Page ==
+
BORA Evaluation Kit BELK-L-S is a development/test board designed to start working with the BORA platform and experimenting with the implemented features. The carrier board hosts a BORA CPU module.
  
−
Please visit [http://www.dave.eu/products/zynq-bora Bora Web Page] for more product information.
+
Please refer to [[BELK|this page]] for more details.
  
−
== Bora Leaflet ==
+
= Stay tuned with updates: BORA RSS Feed =
  
−
Please download Bora's leaflet from the following link: [http://www.dave.eu/sites/default/files/files/Bora-leaflet.pdf]
+
Please subscribe to the <newsfeedlink feed="Bora Pages Updates" format="rss">Bora Pages Updates</newsfeedlink> RSS Feed using your favourite RSS reader to be notified on '''wiki pages updates related to BORA'''.
  
 +
Please refer to the [[Dave_Developer's_Wiki_Conventions#Keeping_updated_on_Dave_Developer.27s_wiki_pages.27_modifications | Keeping updated on '''DAVE Embedded Systems''' Developer's wiki pages modifications]] section for further information on how to subscribe to the RSS feed.
  
 +
= Index of topics about BORA SoM =
  
−
This category collects all the pages specific to Dido modules and related carrier boards.
+
This category collects all the pages specific to Bora modules and related carrier boards.

Revision as of 09:38, 9 October 2018

BORA Xilinx ZYNQ XC7Z010/XC7Z020 CPU module[edit | edit source]

Bora5-small.jpg

BORA is the new top-class Dual Cortex-A9 + FPGA CPU module by DAVE Embedded Systems, based on the recent Xilinx Zynq XC7Z010/XC7Z020 application processor. Thanks to BORA, customers are going to save time and resources by using a compact solution that includes both a CPU and an FPGA, avoiding complexities on the carrier PCB.

BORA is designed and manufactured according to DAVE Embedded Systems Ultra Line specifications, in order to guarantee premium quality and technical value for customers who require top performances and flexibility.

The Hardware Manual (Bora) provides detailed information about hardware interfaces and characteristics. This document will provide a functional overview of the module and will focus on system-related issues.

Please visit BORA Web Page for more product information.

Main Features[edit | edit source]

  • Unmatched performance thanks to dual ARM Cortex-A9 @ 800 MHz
  • Up to 1 GB DDR3 SDRAM
  • All memories you need: on-board NOR and NAND Flash
  • Enabling smarter system thanks to Artix-7 FPGA integrated on chip
  • FPGA banks with Wide range of PSU input (from 1.2V to 3.3V)
  • Highest security and reliability: internal voltage monitoring and power good enable
  • Reduced carrier complexity: DUAL CAN, USB, Ethernet GB and native 3.3V I/O
  • Dual-CAN controller
  • Gigabit Ethernet LAN and additional GMII/MII interface
  • Up to 2x USB OTG
  • Up to 2x UART
  • Up to 2x I²C
  • Up to 2x SPI
  • Precise timing application thanks to on-board 5ppm RTC
  • Easy to fi t thanks to its Small form factor: 85mm x 50mm
  • Industrial (-40/+85°C) operating temperature range


BORA technical specification[edit | edit source]

CPU and Memories
Feature Specifications Options
CPU Xilinx Dual ARM Cortex-A9
ZYNQ XC7Z010/ZC7Z020 @ 800MHz
Cache L1: 32Kbyte instruction, 32Kbyte data
L2: 512Kbyte for each core
RAM DDR3 SDRAM @ 533 MHz
Up to 1 GB
SRAM On-chip RAM, 256 KB
Storage Flash NOR SPI (8, 16 MB)
Flash NAND (all sizes, on request - Up to 1GB)
Peripherals
Feature Specifications Options
Coprocessors NEON™ & Single / Double Precision
Floating Point for each processor
USB Up to 2x 2.0 OTG ports
UARTs Up to 2x UART ports
GPIO Up to x lines, shared with other functions (interrupts available)
Networks Ethernet 10/100/1000 Mbps
CAN 2x full CAN 2.0B compliant interfaces
SD/MMC 2x SD/SDIO 2.0/MMC3.31 compliant controllers
Serial buses 2x full-duplex SPI ports with three peripheral chip selects
2x master and slave I²C interfaces
Timers 2x triple timers/counters (TTC)
RTC On board (DS3232), external battery powered
Debug JTAG IEEE 1149.1 Test Access Port
CoreSight™ and Program Trace Macrocell (PTM)
Electrical, mechanical and environmentale spesifications
Feature Specifications Options
FPGA model Artix™-7
Logic cells 28K to 56K
LUTs 17K to 53K
Flip flops 35K to 100K
RAM 240KB to 560KB
DSP slices 80 to 220
Differential pairs Up to 34 differential pairs for high freq. interfaces
Electrical, mechanical and environmentale spesifications
Feature Specifications Options
Supply Voltage 3.3V, on-board voltage regulation
Active power consumption Please refer to Power consumption section
Dimensions 85mm x 50mm
Weight
MTBF
Operating temperature 0..70 °C
-40..+85 °C
Connectors 3 x 140 pins 0.6mm pitch
Bora-bd.png

Hardware Documentation[edit | edit source]

Electrical Schematics Mechanical Documentation Carrier Board design Thermal & Power Management

Software Documentation[edit | edit source]

Bootloader Linux Vivado

BORA Evaluation Kit[edit | edit source]

BORA Evaluation Kit BELK-L-S is a development/test board designed to start working with the BORA platform and experimenting with the implemented features. The carrier board hosts a BORA CPU module.

Please refer to this page for more details.

Stay tuned with updates: BORA RSS Feed[edit | edit source]

Please subscribe to the Bora Pages Updates RSS Feed using your favourite RSS reader to be notified on wiki pages updates related to BORA.

Please refer to the Keeping updated on DAVE Embedded Systems Developer's wiki pages modifications section for further information on how to subscribe to the RSS feed.

Index of topics about BORA SoM[edit | edit source]

This category collects all the pages specific to Bora modules and related carrier boards.

Pages in category "Bora"

The following 63 pages are in this category, out of 63 total.

A

B

C

D

F

H

I

L

M

P

R

S

T

W

Retrieved from "https://wiki.dave.eu/index.php?title=Category:Bora&oldid=8242"