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Carrier board design guidelines (SOM)

75 bytes added, 09:50, 23 October 2012
Case #3: PHY is not integrated on SOM and a RMII PHY is used
==== Case #3: PHY is not integrated on SOM and a RMII PHY is used ====
This section refers to the case of * PHY is not integrated on SOM and an RMII * 10/100 Ethernet PHY populate don carrier board and interfaced to SOM through RMII interface (this solution is used such as implemented for example in [[Maya SOM|Maya]] and [[Maya SOM|NaonMayaEVB-Lite]]board.
===== Schematics =====
* If possible, place series resistor to RMII interface signals
* Keep MDIO clock signal isolated from other signals
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=== USB ===
==== Schematics ====

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