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===== Schematics =====
* If LAN connector with integrated magnetic is used:
** predispose some ethernet protection diodes on ethernet lines
** Connect connector shield to an adeguate GND or shield Plane
===== PCB =====
{| {{table border=1}}
| Gap than other signals ||2xgap||4xgap||-
|-
| Intra pair matching(mils)||0||25100||240
|-
| TX and RX via mismatch||0||0||1
| Gap than other signals ||4xwidth||||-
|-
| Matching(mils)||-||250-||-200
|-
| Via Mismatch||0||0||1
|-
| Intra pair matching(mils)||0||10||10
|-
| Max PCB trace length ||-||-||3"
==== Case #3: PHY is not integrated on SOM and a RMII PHY is used ====
This section refers to the case of PHY is not integrated on SOM and an RMII 10/100 Ethernet PHY is used such as [[Maya SOM|Maya]] and [[Maya SOM|Naon]].
===== Schematics =====
* If possible, place series resistor to RMII interface signals
| Gap than other signals||3xgap||5xgap||-
|-
| Intra pair matching(mils) at 225MHz clock||0||8020||250
|-
| Inter pair matching(mils) at 225MHz clock||0||250||1"
|}
* Place a continuos reference plane underneath differential pair
* Try to match lines as best as possible
=== SATA ===
==== Schematics ====
| Gap than other signals||2xgap||-||-
|-
| Intra pair matching(mils||0-||15-||25note 1
|-
| Inter pair matching(mils)||0-||15-||25note 1
|-
| Max allowed stubs ||-||-||0
* Place a continuos reference plane underneath differential pair
* Minimized vias use
* No strong matching required between TX and RX, but keep same route for every differential pair
=== LCD Interface ===
==== Schematics ====
* Please refer to DAVE system-on-modules (SOM) specific documentationcarrier board documentationfor further information
* Predispose series resistor terminator (RPACK for LCD data and single resistor for Clock and H-SYNC and V-SYNC)
* Series resistor value may vary depending PCB and schematic
==== PCB ====
* If possible, use 50ohm common mode lines
* Match LCD parallel signals in accordition with Pixel Clock frequency (further details in SOM specifications)
* Avoid use of long traces connection (max 10" on PCB)
* Avoid stubs
=== VIN Interface ===
==== Schematics ====
* Please refer to DAVE system-on-modules (SOM) specific documentationcarrier board documentationfor further information
* Predispose series resistor terminator (RPACK for LCD data and single resistor for Clock and H-SYNC and V-SYNC)
* Series resistor value may vary depending PCB and schematic
==== PCB ====
* If possible, use 50ohm common mode lines
* Match VIN parallel signals in accordition with Pixel Clock frequency (further details in SOM specifications)
* Avoid use of long traces connection (max 10" on PCB)
* Avoid stubs
=== TVOUT ===
==== Schematics ====
* Please refer to DAVE system-on-modules (SOM) specific documentation carrier board documentationfor further information
==== PCB ====
{| {{table border=1}}
| Gap than other signals||2xwidth||-||-
|}
* Keep analog TVOUT signal far from noise signals
=== I2C Interface ===
==== Schematics ====
* Predispose properly pullup resistors on line in accordition with DAVE system-on-modules (SOM)
* Do not overload I2C lines with too much devices
* Ensure that I2C devices are being properly reset initialized during power up to prevent bus lockup conditions
==== PCB ====
* Isolate I2C clock from noise senitive sensitive signals
* Avoid stub