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Carrier board design guidelines (SOM)

3,817 bytes added, 12:21, 22 October 2012
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In this section basics hardware guidelines valid for all DAVE SOMs are analyzed.
=== Schematics ===
* Check mirroring and pinout for every of DAVE system-on-modules (SOM) connector * Properly decouple DAVE system-on the board-modules (SOM) power supply with large bulk capacitor and small bypass capacitor* Use low-ESR X7R capacitor if possible* Check for correct connection of TX and RX lines
* Add series resistors as interface needs (see interface details)
* TBD
=== PCB ===
==== PCB Tecnology ====
| Minimum number of via for each power signal SOM connector pin||1||2||-
|-
| Component package size||0402-||0603||-
|-
| PCB Height(mm)||1,4||1,6||-
* If vias smaller than minimum advised size are used, take care to maintain an adeguate number of via when you change layer on each power signal.<br/>
* PCB heights less than minimum advised can produce PCB heating and mechanical issues
* Use Solid Connection for on plane vias
==== PCB Basics Guidelins ====
* Isolate clock and HI-SPEED signal (differential lines i.e.) for at least two times trace width or gap for differential lines
* Avoid voids on planes
* Use Solid Connection for on plane vias
* Place bulk and ByPass capacitor near DAVE system-on-modules (SOM) power supply pins
== Interfaces Guidelines ==
| align="center" style="background:#f0f0f0;"|'''Max'''
|-
| Differential Impedance(ohm)||76-||95100||114-
|-
| Common Mode Impedance||46,75-||5550||63,25-
|-
| Gap between than TX and RX linessignals ||2xseparation2xgap||2xseparation2xgap||-
|-
| Gap between than other signalsignals ||2xseparation2xgap||4xseparation4xgap||-
|-
| Intra pair matching(mils)||0||25||240
| Common mode impedance(ohm)||-||50||-
|-
| Gap between linesthan other ethernet diff pair ||2xW4xwidth||-||-
|-
| Gap between than other signalsignals ||4xW4xwidth||||-
|-
| Matching(mils)||-||250||-
<br/>
{| {{table border=1}}
| align="center" style="background:#f0f0f0;"|'''Parameter for Gigabit LinesDifferential Pairs'''
| align="center" style="background:#f0f0f0;"|'''Min'''
| align="center" style="background:#f0f0f0;"|'''Typ'''
| align="center" style="background:#f0f0f0;"|'''Max'''
|-
| Differential Impedance(ohm)||76-||95100||114-
|-
| Common Mode Impedance||46,75-||5550||63,25-
|-
| Gap between than TX and RX linessignals ||2xseparation2xgap||2xseparation2xgap||-
|-
| Gap between than other signalsignals ||2xseparation2xgap||4xseparation4xgap||-
|-
| Intra pair matching(mils)||0||10||10
* Place bypass capacitor near every PHY supply pin
* Connect every capacitor's pin to the plane with at least 2 vias and the shortest trace pattern
* Place PHY device not too near to connector at least 1" (250 mils reccomended 25mm) distance)far away connector
* Keep MDIO clock signal isolated from other signals
|}
* Since RMII signals are not critical such as RGMII, is not necessary a strong matching between lines.
* Avoid signal long traces too long
* Avoid stubs
* Keep as best as possibile the same routing for all RMII traces
<br/>
{| {{table border=1}}
| align="center" style="background:#f0f0f0;"|'''Parameter for Ethernet LinesDifferential Pairs'''
| align="center" style="background:#f0f0f0;"|'''Min'''
| align="center" style="background:#f0f0f0;"|'''Typ'''
| align="center" style="background:#f0f0f0;"|'''Max'''
|-
| Differential Impedance(ohm)||76-||95100||114-
|-
| Common Mode Impedance||46,75-||5550||63,25-
|-
| Gap between than other TX and RX linessignals ||2xseparation2xgap||2xseparation2xgap||-
|-
| Gap between than other signalsignals ||2xseparation2xgap||4xseparation4xgap||-
|-
| Intra pair matching(mils)||0||25||240150
|-
| TX and RX via mismatch||0||0||1
* Place bypass capacitor near every PHY supply pin
* Connect every capacitor's pin to the plane with at least 2 vias and the shortest trace pattern
* Place PHY device not too near to connector at least 1" (250 mils reccomended 25mm) distance)far away connector
* Keep MDIO clock signal isolated from other signals
<br/>
=== USB ===
==== Schematics ====
* Create schematic in accordition with DAVE system-on-modules (SOM) USB specification ( see SOM detailed pages )
==== PCB ====
{| {{table border=1}}
| align="center" style="background:#f0f0f0;"|'''Parameter for USB Differential Pairs'''
| align="center" style="background:#f0f0f0;"|'''Min'''
| align="center" style="background:#f0f0f0;"|'''Typ'''
| align="center" style="background:#f0f0f0;"|'''Max'''
|-
| Differential Impedance(ohm)||80||90||100
|-
| Common Mode Impedance||40,5||45||49.5
|-
| Gap than other signals||3xgap||5xgap||-
|-
| Intra pair matching(mils)||0||25||150
|-
| Max allowed stubs ||-||-||0
|-
| Max traces length ||-||-||18"
|-
| Max allowed plane split under traces ||-||-||0
|-
|}
* If a stub is unavoidable in the design, no stub should be greater than 200 mils.
* Place a continuos reference plane underneath differential pair
=== HDMI ===
==== Schematics ====
* Add a Transmitter Port Protection to HDMI lines
* Use certified HDMI connector
* Connector shield must be properly connected
==== PCB ====
{| {{table border=1}}
| align="center" style="background:#f0f0f0;"|'''Parameter for HDMI Differential Pairs'''
| align="center" style="background:#f0f0f0;"|'''Min'''
| align="center" style="background:#f0f0f0;"|'''Typ'''
| align="center" style="background:#f0f0f0;"|'''Max'''
|-
| Differential Impedance(ohm)||85||100||115
|-
| Gap than other signals||3xgap||5xgap||-
|-
| Intra pair matching(mils) at 225MHz clock||0||80||250
|-
| Inter pair matching(mils) at 225MHz clock||0||250||1"
|-
| Max allowed stubs ||-||-||0
|-
| Max allowed plane split under traces ||-||-||0
|-
|}
* Place a continuos reference plane underneath differential pair
=== SATA ===
==== Schematics ====
* Use certified SATA connector
==== PCB ====
{| {{table border=1}}
| align="center" style="background:#f0f0f0;"|'''Parameter for SATA Differential Pairs'''
| align="center" style="background:#f0f0f0;"|'''Min'''
| align="center" style="background:#f0f0f0;"|'''Typ'''
| align="center" style="background:#f0f0f0;"|'''Max'''
|-
| Differential Impedance(ohm)||80||100||120
|-
| Common Mode Impedance(ohm)||51||60||69
|-
| Gap than other signals||2xgap||-||-
|-
| Intra pair matching(mils||0||15||25
|-
| Inter pair matching(mils)||0||15||25
|-
| Max allowed stubs ||-||-||0
|-
| Max allowed plane split under traces ||-||-||0
|-
| Max allowed length||-||-||6.0"
|}
* Place a continuos reference plane underneath differential pair
* Minimized vias use
=== LCD Interface ===
==== Schematics ====
* Please refer to DAVE system-on-modules (SOM) specific documentation
* Predispose series resistor terminator
==== PCB ====
* If possible, use 50ohm common mode lines
* Match as best as possibile LCD parallel lines (in accordition with Pixel Clock frequency)
=== VIN Interface ===
==== Schematics ====
* Please refer to DAVE system-on-modules (SOM) specific documentation
* Predispose series resistor terminator
==== PCB ====
* If possible, use 50ohm common mode lines
* Match as best as possibile VIN parallel lines (in accordition with Pixel Clock frequency)
=== TVOUT ===
==== Schematics ====
* Please refer to DAVE system-on-modules (SOM) specific documentation
==== PCB ====
{| {{table border=1}}
| align="center" style="background:#f0f0f0;"|'''Parameter for SATA Differential Pairs'''
| align="center" style="background:#f0f0f0;"|'''Min'''
| align="center" style="background:#f0f0f0;"|'''Typ'''
| align="center" style="background:#f0f0f0;"|'''Max'''
|-
| Common Mode Impedance(ohm)||-||75||-
|-
| Gap than other signals||2xwidth||-||-
|}