|
|-
| rowspan="26" |13
|IO_L11P_T1_SRCC_13
|IO_L23P_T3_13
|LVDS
|-
|13
|IO_L11N_T1_SRCC_13
|IO_L23N_T3_13
|LVDS
|-
|13
|IO_L12P_T1_MRCC_13
|IO_L9P_T1_DQS_13
|LVDS
|-
|13
|IO_L12N_T1_MRCC_13
|IO_L9N_T1_DQS_13
|LVDS
|-
|13
|IO_L13P_T2_MRCC_13
|IO_L7P_T1_13
|LVDS
|-
|13
|IO_L13N_T2_MRCC_13
|IO_L7N_T1_13
|LVDS
|-
|13
|IO_L14P_T2_SRCC_13
|IO_L15P_T2_DQS_13
| colspan="3" |n/a
|-
|13
|IO_L14N_T2_SRCC_13
|IO_L15N_T2_DQS_13
| colspan="3" |n/a
|-
|13
|IO_L15P_T2_DQS_13
|IO_L5P_T0_13
|LVDS
|-
|13
|IO_L15N_T2_DQS_13
|IO_L5N_T0_13
|LVDS
|-
| rowspan="2" IO_L16N_T2_13|13||||||-|IO_L16P_T2_13|||||||-|IO_L17N_T2_13|||||||-|IO_L17P_T2_13|||||||-|IO_L18N_T2_13|||||||-|IO_L18P_T2_13|||||||-|IO_L19N_T3_VREF_13|||||||-|IO_L19P_T3_13|||||||-|IO_L20N_T3_13|||||||-|IO_L20P_T3_13|||||||-|IO_L21N_T3_DQS_13|||||||-|IO_L21P_T3_DQS_13|||||||-|IO_L22N_T3_13|||||||-|IO_L22P_T3_13|||||||-
| rowspan="2" |IO_L6N_T0_VREF_13
| rowspan="2" |IO_L6N_T0_VREF_13
|}
There are also some Carrier signals unavailable for the Boralite SoM. The following signals are '''not ''' routed to the SoM due to the limited pin counte count of the SODIMM connector.
{| class="wikitable"
|+
BoraXEVB's signal that are not available when mated with Bora Lite SoM
!Bank
!Carrier's signal