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BoraXEVB

370 bytes added, 10:02, 26 January 2022
Bank 35 VDDIO selection connector (JP27)
== Connectors pinout ==
<section begin=CPU/>
=== J1,J2 and J3 ===
The pinout of the J1, J2 and J3 connectors of the Bora Xpress EVB is the same of the [[Pinout (BORAXpress)BORA_Xpress_SOM/BORA_Xpress_Hardware/Pinout_Table#Connectors_description|counterpart connectors on BORA Xpress module]].<section end=CPU/><section begin=Power Supply/>
<section begin=Power Supply/>
=== Power supply - JP2 ===
|}
<b>(*)</b> Boot mode from NAND in supported '''ONLY''' on [[:Category:BoraLite BORA Lite SOM|BoraLiteBORA Lite]] SOM module
<section end=Boot Configurations/>
 
 
<section begin=Watchdog/>
=== WatchDog Settings - S1, S2 and S3 ===
S1, S2 and S3 are dip-switch to override the default startup delay and timeout of the BORA Xpress module watchdog.
For more details please refer to [[BORA_Xpress_SOM/BORA_Xpress_Hardware/Peripherals/Watchdog (BORAXpress)|this page]].
{| class="wikitable"
|}
<section end=Watchdog/>
<section begin=Ethernet0/>
<section begin=Ethernet0/>
=== Ethernet port #0 (ETH0) - J8 ===
|}
<section end=Ethernet0/>
 
<section begin=Ethernet1/>
=== Ethernet port #1 (ETH1) - J9 ===
<section begin=DWM/>
=== DWM (DAVE Wifi/BT module) socket - J23 ===
J23 is a 52991-0308 connector type (30 pins, vertical, 0.50mm picth). This socket connects the [[Wireless_Module_(DWM) DWM_ADD-ON | DWM Wireless Module]] (optional) to the BORA Xpress EVB. The following table reports the pinout of the connector:
{| class="wikitable"
<section begin=CAN/>
 
=== CAN - J24 ===
J24 is a 10-pin 5x2x2.54mm pitch vertical header directly connected to BORA Xpress SoM's transceiver for the CAN interface. This 2.5mm-pitch header is compatible with commonly available IDC-10/DB9 flat cables. The following table reports the pinout of the connector:
|}
<section end=CAN/>
 
<section begin=Touchscreen/>
=== Touch screen - J25===
|}
<section end=Touchscreen/>
 
<section begin=LVDS/>
=== LVDS - J26 ===
|}
<section end=LVDS/>
 
<section begin=FMC/>
=== FPGA Mezzanine Card (FMC) Connector - J27 ===
|}
<section end=FMC/>
<section begin=PinStrip/>
=== Pin strip connectors ===
<section begin=RTC/>
<section end=PinStrip/>
==== FPGA, WatchDog, RTC, RST - JP22 ====
JP22 is a 16-pin 8x2x2.54 pitch vertical header. The following table reports the pinout of the connector:
<section end=PMOD/>
===JP27, JP27 and JP28===
These connectors allow to select power voltage of PL's I/O banks. For more details please refer to [[#PL's I/O voltage selections|this section]].
==PL's I/O voltage selections==
<section begin=Voltage selections/>
PL's I/O banks voltage can be selected via configuration jumpers. It is worth remembering that:
*'''each bank must be powered even if none of its I/Os is used'''
# Jumper on 9-10 -> adds 100mV to VDDIO_BANK35
{{ImportantMessage|text=Please note that by default VDDIO_BANK35 is supplied by VADJ Regulator.For using a dedicated VDDIO_BANK35, it is required to remove R343 and mount R344: check BORA Xpress Evaluation Kit schematics page 10.<br>Then, check and/or properly configure JP27 for selecting the required VDDIO_BANK35}}
===== Bank 34 and VADJ VDDIO selection connector (JP28) =====
The default configuration is:
# Jumper on 5-6 -> supply VADJ with 1.8V
<section end=Voltage selections/>
<section begin=SOM/>
==Schematics==
* ORCAD: [[mirrorhttps:bora/hw/BoraXEVB/BORAXEVB-1www.6dave.1-BELK-dsn.zip|eu/links/p/yYW9VNsGutz6V0dd BORAXEVB-1.6.1-BELK-dsn.zip]]* PDF : [[mirrorhttps:bora/hw/www.dave.eu/links/p/hClB4N7blBdSG6AH BoraXEVB/-S-EVBBX0000C0R-1.6.1_color1.pdf|] ===BOM===* BoraXEVB-S-: [https://www.dave.eu/links/p/PU08ewKLvX9Z9tZJ BORAXEVB_S.EVBBX0000C0R-.1.6.10.CSV.pdf]zip]
==BOM=Layout===* BoraXEVB: [[mirrorhttps:bora/hw/BoraXEVB/BORAXEVB_Swww.EVBBX0000C0Rdave.1.6.0.CSV.zip|BORAXEVB_S.EVBBX0000C0R.1.6.0.CSV.zip]eu/links/p/cPT5UVAFNiSzj4NR CS143714 Assembly view]
==Layout==* [[mirror:bora/hw/BoraXEVB/boraxevb-CS143714_assem_view.pdf|boraxevb-CS143714_assem_view.pdf]]==PCB design (Mentor PADS)===* [[mirrorhttps:bora/hw/BoraXEVBwww.dave.eu/links/p/BCTblnPPoDiwPrAE CS143714.zip|CS143714.zip]]
<section end=Schematics/>
<section begin=Mechanicals/>
<section begin=Mechanicals/>
==Mechanical==
* DXF: [[mirrorhttps:bora/hw/BoraXEVB/boraxevb-2D-CS143714www.dxfdave.zip|eu/links/p/s1k5AXL3AiCIo7Fj boraxevb-2D-CS143714.dxf.zip]]* IDF (3D): [[mirrorhttps:bora/hw/BoraXEVBwww.dave.eu/links/p/xeQvq2IvKig5vlfd boraxevb-3D-CS143714.zip|boraxevb-3D-CS143714.zip]]* STEP (3D): [[mirrorhttps:bora/hw/BoraXEVBwww.dave.eu/links/p/cj2s2AlBHkeY7tJ7 boraxevb_3D_step_cs143714.zip|boraxevb_3D_step_cs143714.zip]]
<section end=Mechanicals/>
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