Difference between revisions of "Booting options (SBC Lynx)"

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(Internal boot)
(Available options)
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[1] Nevertheless, SBC Lynx can support this option. This is a clear example of a feature that can be implemented on request. For more information please contact [mailto:sales@dave.eu|Sales department].
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[1] Nevertheless, SBC Lynx can support this option. This is a clear example of a feature that can be implemented on request. For more information please contact [mailto:sales@dave.eu Sales department].
 
===Internal boot===
 
===Internal boot===
 
When ''Internal boot'' mode is selected, ''GPIO override'' technique is used to configure bootstrap flags, also known as <code>BOOT_CFG</code> bits. This means that 24 processor's signals - specifically LCD1_DATA[23:00] - are latched by iMX6UL processor upon reset to get bootstrap flags. As such, these signals need to be pulled up or down to select the proper configuration.
 
When ''Internal boot'' mode is selected, ''GPIO override'' technique is used to configure bootstrap flags, also known as <code>BOOT_CFG</code> bits. This means that 24 processor's signals - specifically LCD1_DATA[23:00] - are latched by iMX6UL processor upon reset to get bootstrap flags. As such, these signals need to be pulled up or down to select the proper configuration.
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USBOTG1: this interface is connected to J55. The use of this port is user defined.
 
USBOTG1: this interface is connected to J55. The use of this port is user defined.
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==References==
 
==References==
 
{{reflist}}
 
{{reflist}}

Revision as of 09:42, 13 October 2016

Info Box
SBC Lynx-top.png Applies to SBC Lynx


200px-Emblem-important.svg.png

SBC Lynx is extremely flexible in terms of hardware configurations. This document describes main options related to booting. In case you need a configuration that is not listed here, please contact [mailto:sales@dave.eu

Introduction[edit | edit source]

SBC Lynx is built upon NXP iMX6UL processor. This component supports several booting options that are summarized here. Reading of that section is recommended for understanding this document.

Interested reader may find an exhaustive discussion of iMX6UL boot options in the Applications Processor Reference Manual[1].

Available options[edit | edit source]

By default, eFUSE bits are not supported as bootstrap option [1]. Thus two actual modes can be selected by S12.1 and S12.2 switches, as listed in the following table.

BOOT_MODE[1:0] Boot type S12.2 (BOOT_MODE1) S12.1 (BOOT_MODE0) Notes
00 Boot from eFUSEs off off Supported on request only
01 Serial downloader off on
10 Internal boot on off Default
11 reserved on on Reserved


[1] Nevertheless, SBC Lynx can support this option. This is a clear example of a feature that can be implemented on request. For more information please contact Sales department.

Internal boot[edit | edit source]

When Internal boot mode is selected, GPIO override technique is used to configure bootstrap flags, also known as BOOT_CFG bits. This means that 24 processor's signals - specifically LCD1_DATA[23:00] - are latched by iMX6UL processor upon reset to get bootstrap flags. As such, these signals need to be pulled up or down to select the proper configuration.

The following table summarizes these configurations. Pull-up/down resistors are 10kOhm.

Ordering code(s) →
-----
BOOT_CFG bits
XUBx0xxx
XUBx2xxx
XUBx1xxx
LCD_DATA23 (BOOT_CFG4_7) pull-down TBD
LCD_DATA22 (BOOT_CFG4_6) pull-down TBD
LCD_DATA21 (BOOT_CFG4_5) pull-down TBD
LCD_DATA20 (BOOT_CFG4_4) pull-down TBD
LCD_DATA19 (BOOT_CFG4_3) pull-up TBD
LCD_DATA18 (BOOT_CFG4_2) pull-down TBD
LCD_DATA17 (BOOT_CFG4_1) pull-down TBD
LCD_DATA16 (BOOT_CFG4_0) pull-down TBD
LCD_DATA15 (BOOT_CFG2_7) pull-up TBD
LCD_DATA14 (BOOT_CFG2_6) pull-up TBD
LCD_DATA13 (BOOT_CFG2_5) pull-up TBD
LCD_DATA12 (BOOT_CFG2_4) pull-up TBD
LCD_DATA11 (BOOT_CFG2_3) pull-up TBD
LCD_DATA10 (BOOT_CFG2_2) pull-down TBD
LCD_DATA09 (BOOT_CFG2_1) pull-up TBD
LCD_DATA08 (BOOT_CFG2_0) pull-up TBD
LCD_DATA07 (BOOT_CFG1_7) pull-down TBD
LCD_DATA06 (BOOT_CFG1_6) pull-down TBD
LCD_DATA05 (BOOT_CFG1_5) pull-up TBD
LCD_DATA04 (BOOT_CFG1_4) pull-up TBD
LCD_DATA03 (BOOT_CFG1_3) pull-up TBD
LCD_DATA02 (BOOT_CFG1_2) pull-up TBD
LCD_DATA01 (BOOT_CFG1_1) pull-up TBD
LCD_DATA00 (BOOT_CFG1_0) pull-up TBD


The following sections provides additional notes related to the use of Internal boot on SBC Lynx.

Ordering codes XUBx1000[edit | edit source]

Serial downloader[edit | edit source]

Generally speaking, serial downloader allows to download a program image to the target over USB or UART connections. The following flow chart details the sequence of operations that are performed by BootROM in Serial Download mode (source Applications Processor Reference Manual[1].


Serial download boot flow


The following sections provides additional notes related to the use of Serial Downloader on SBC Lynx in order to warn the user about possible conflicts that may occur depending on what is connected to USBOTG1 port, UART1 and UART2 interfaces.

Ordering codes XUBx1000[edit | edit source]

UART1: this UART is routed to connector J42 that is typically used for console.

UART2: this UART is routed to connector J46 that is dedicated to optional DWM WiFi/Bluetooth module. Even if DWM is populated, non electrical conflicts occur.

USBOTG1: this interface is connected to J55. The use of this port is user defined.

References[edit | edit source]

  1. 1.0 1.1 NXP, IMX6ULRM, i.MX 6UltraLite Applications Processor Reference Manual