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<section begin="History" />
{| style="border-collapse:collapse; "
! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
|-
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |1.0.0{{oldid| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" 15399| Nov 2021/011/23}}
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | New documentation layout
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | {{oldid|17175|2022/11/24}}
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | Added on SOC section option G and modified option B
|-
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" | 2023/01/09
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" | Added explanation NOR SPI size limitation
|}
<section end="History" />
__FORCETOC__
<section begin="Body" />
==Part number composition==
BORA Xpress SOM module part number is identified by the following digit-code table:
{|class="wikitable" style="width:50%"!style="width:10%"|Part number structure!style="width:40%"|Options!style="width:20%"|Description
|-
!Family
|
* A: XC7Z015 ARM Cortex-A9 866MHz - Speed grade ''-1''
* B: XC7Z015 ARM Cortex-A9 866MHz - Speed grade ''-2without tranceivers''
* C: XC7Z015 ARM Cortex-A9 866MHz - Speed grade ''-3''
* D: XC7Z030 ARM Cortex-A9 866MHz - Speed grade ''-1''
* E: XC7Z030 ARM Cortex-A9 866MHz - Speed grade ''-2''
* F: XC7Z030 ARM Cortex-A9 866MHz - Speed grade ''-3''
* G: XC7Z015 ARM Cortex-A9 866MHz - Speed grade ''-2''
|System on chip definition (and FPGA speed grade)
|-
* 0: 0MB
* 4: 16MB
|QUAD SPI NOR flash memory size- The limitation to max 16MB is due to this [https://support.xilinx.com/s/article/57744?language=en_US Errata from Xilinx]. The proposed solution by Xilinx has not been approved by DAVE Embedded Systems
|-
!RAM
BORA Xpress SOM code '''DBXD4110I2R-00'''
* DBR DBX - BORA Xpress SOM module
* D - XC7Z030 ARM Cortex-A9 866MHz - Speed grade ''-1''
* 4 - 16MB NOR Flash
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[[Category:BORA XpresssXpress]]