Difference between revisions of "BORA Xpress SOM"

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== Software ==
 
== Software ==
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The following sections provide information about the software components of the BELK kit. The reference BELK version is 3.0.0.
  
 
=== Introduction to the development environment ===
 
=== Introduction to the development environment ===

Revision as of 14:30, 2 March 2016

Info Box
BORA Xpress.png Applies to BORA Xpress

Introduction[edit | edit source]

BORA Xpress is the top-class Dual Cortex-A9 + FPGA CPU module by DAVE Embedded Systems, based on the recent Xilinx "Zynq" XC7Z015 / XC7Z030 application processor. BORA Xpress offers great computational power, thanks to the rich set of peripherals, the Dual Cortex-A9 and the Artix-7 FPGA inside. BORA Xpress is designed in order to keep full compatibility with the ULTRA Line CPU modules, to guarantee the premium quality and technical value of those customers that require top performances.

The Hardware section provides detailed information about hardware interfaces and characteristics. This document will provide a functional overview of the module and will focus on system-related issues.

Block diagram[edit | edit source]

The following picture shows a simplified block diagram of BORA Xpress module.

BORA-Xpress-bd-1600.png

Product Highlights[edit | edit source]

  • Unmatched performance thanks to Dual ARM Cortex-A9 @ up to 1GHz
  • SERDES: Xpress lanes up to 6.25 Gbps
  • All memories you need: on-board NOR and NAND Flash
  • Enabling smarter system thanks to Artix-7 or Kintex-7 FPGA integrated on-chip
  • FPGA banks wide range PSU input from 1.2V to 3.3V
  • Highest security and reliability: internal voltage monitoring and power good enable
  • Reduced carrier complexity: dual CAN, USB, Ethernet GB and native 3.3 V I/O
  • Easy to fit thanks to its small form factor
  • Accurate timing application thanks to on-board 5ppm RTC
  • Pin2Pin Compatibility with BORA SOM based on Zynq XC7Z010/XC7Z020

Feature Summary[edit | edit source]

Feature Specifications Options
CPU Xilinx Dual ARM Cortex-A9
ZYNQ XC7Z015/ZC7Z030 @ 666MHz (up to 1GHz)
Cache L1: 32Kbyte instruction, 32Kbyte data
L2: 512Kbyte for each core
RAM DDR3 SDRAM @ 533 MHz
Up to 1 GB
SRAM On-chip RAM, 256 KB
Storage Flash NOR SPI (8, 16 MB)
Flash NAND (all sizes up to 1GB, on request)
Table: CPU and Memories
Feature Specifications Options
Coprocessors NEON™ & Single / Double Precision
Floating Point for each processor
USB Up to 2x 2.0 OTG ports
UARTs Up to 2x UART ports
GPIO Up to x lines, shared with other functions (interrupts available)
Networks Ethernet 10/100/1000 Mbps
CAN 2x full CAN 2.0B compliant interfaces
SD/MMC 2x SD/SDIO 2.0/MMC3.31 compliant controllers
Serial buses 2x full-duplex SPI ports with three peripheral chip selects
2x master and slave I²C interfaces
Timers 2x triple timers/counters (TTC)
RTC On board (DS3232), external battery powered
Debug JTAG IEEE 1149.1 Test Access Port
CoreSight™ and Program Trace Macrocell (PTM)
Table: Peripherals
Feature Specifications Options
FPGA models Artix™-7 / Kintex™-7
Logic cells 74K to 125K
LUTs 46K to 78K
Flip flops 92K to 157K
RAM 3.3Mb to 9.3Mb
DSP slices 160 to 400
Differential pairs Up to 72 differential pairs for high freq. interfaces
Serial Transceivers 4 Lanes up to 6.6Gbps
Table: Electrical, Mechanical and Environmental Specifications
Feature Specifications Options
Supply Voltage 3.3V, on-board voltage regulation
Active power consumption Please refer to Power consumption section
Dimensions 85mm x 50mm
Weight
MTBF
Operating temperature 0..70 °C
-40..+85 °C
Connectors 3 x 140 pins 0.6mm pitch
Table: Electrical, Mechanical and Environmental Specifications


Hardware[edit | edit source]

Please refer to Hardware Manual (BORAXpress) for detailed hardware related information on BORA Xpress SOM.

Design Overview[edit | edit source]

Please refer to this page for more details.

Mechanicals[edit | edit source]

Please refer to this page for more details.

Pinout[edit | edit source]

Please refer to this page for more details.

Power[edit | edit source]

Please refer to this page for more details.

Reset scheme[edit | edit source]

Bora provides several different resets signals. Please refer to Reset scheme for more details.

Processing system (PS) peripherals[edit | edit source]

Please refer to this page for more details.

Programmable logic (PL)[edit | edit source]

Please refer to this page for more details.

RTC[edit | edit source]

Please refer to this page for more details.

Thermal IC[edit | edit source]

Please refer to this page for more details.

Watchdog[edit | edit source]

Please refer to this page for more details.

Software[edit | edit source]

The following sections provide information about the software components of the BELK kit. The reference BELK version is 3.0.0.

Introduction to the development environment[edit | edit source]

Please refer to this page

for more details.

Build system[edit | edit source]

Please refer to this page

for more details.

Creating and building an example Vivado project[edit | edit source]

Please refer to this page

for more details.

Building U-Boot[edit | edit source]

Please refer to this page

for more details.

Building Linux[edit | edit source]

Please refer to this page

for more details.

Building the software components via Yocto[edit | edit source]

Please refer to this page

for more details.

Booting the system via NFS[edit | edit source]

Please refer to this page

for more details.

System boot and recovery via microSD card[edit | edit source]

Please refer to this page

for more details.

ConfigID management[edit | edit source]

Please refer to this page

for more details.