Open main menu

DAVE Developer's Wiki β

Changes

BORA Lite SOM/Part number composition

1,048 bytes added, 7 April
no edit summary
<section begin="History" />
{| style="border-collapse:collapse; "
! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
|-
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Version
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
|-
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |1.0.0{{oldid| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" 11600| Nov 202011600}}
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | First version
|-
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|17185|17185}}
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | Added SOCs versions
|-
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | {{oldid|17185|19369}}
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | Added explanation NOR SPI size limitation
|-
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | {{oldid|20242|20242}}
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | Added XC7020 speed grade 3
|-
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" | {{oldid|20317|20317}}
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" | Added XC7014S speed grade 1
|}
<section end="History" />
__FORCETOC__
<section begin="Body" />
==Part number composition==
BORA Lite SOM module part number is identified by the following digit-code table:
{|class="wikitable" style="width:50%"!style="width:10%"|Part number structure!style="width:40%"|Options!style="width:20%"|Description|-!Family|'''DBT'''|Family prefix code
|-
!SOC
|
* A: XC7Z010 ARM Cortex-A9 667MHz - Speed grade ''-1''
* B: XC7Z010 ARM Cortex-A9 766MHz - Speed grade ''-2''
* C: XC7Z010 ARM Cortex-A9 866MHz - Speed grade ''-3''
* D: XC7Z020 ARM Cortex-A9 667MHz - Speed grade ''-1''
* EL: XC7Z020 ARM Cortex-A9 766MHz 667MHz - Speed grade ''-21'' Automotive Grade* J: XC7Z007S ARM Cortex-A9 667MHz - Speed grade ''-1''
* F: XC7Z020 ARM Cortex-A9 866MHz - Speed grade ''-3''
* H: XC7Z020 ARM Cortex-A9 866MHz - Military grade* IK: XC7Z014S ARM Cortex-A9 766MHz 667MHz - Speed grade ''-21''
|System on chip definition (and FPGA speed grade)
|-
* 0: 0MB
* 4: 16MB
|QUAD SPI NOR flash memory size- The limitation to max 16MB is due to this [https://support.xilinx.com/s/article/57744?language=en_US Errata from Xilinx]. The proposed solution by Xilinx has not been approved by DAVE Embedded Systems
|-
!RAM
!Boot/Misc
|
* 0: NOR boot, FPGA 34 fixed PSU, no Voltage Monitor* 1: NOR boot, FPGA 34 variable PSU, no Voltage Monitor * 2: NOR boot, FPGA 34 fixed PSU, Voltage Monitor* 3: NOR boot, FPGA 34 variable PSU, Voltage Monitor* 4: NOR boot, FPGA 34 fixed PSU, MON_1V8|Boot and Voltage Monitor options
|-
!Temperature range
|
* C - Commercial grade: suitable for 0/70°C environmentto70°C* I - Industrial grade: suitable for -40/to 85°C environment* S - Super Commercial grade: suitable for 0/85°C environment* Q - Military Grade: -40-125°C|For the DAVE Embedded Systems' product Temperature Range classification, please find more information at the page [[Products Classification]]
|-
!PCB revision
|
* 0: first version
* 1: revision B
* 2: revision C
* 3: revision D - SnPb version
* 4: revision C - NAND winbond
|PCB release may change for manufacturing purposes (i.e. text fixture adaptation)
|-
|
* R: RoHS compliant
* D: No RoHS, conformal coating, sealing
* P: SnPb process, sealing, acrylic coating
|typically connected to production process and quality
|-
=== Example ===
BORA Lite SOM code '''DBRF4110C2RDBTD4111I0R-00'''
* DBR DBT - BORA Lite SOM module* F D - XC7Z020 ARM Cortex-A9 866MHz - Speed grade ''-31''
* 4 - 16MB NOR Flash
* 1 - 1GB DDR3
* 1 - 1GB NAND flash
* 0 1 - NOR boot, FPGA bank 34 fixed PSU, without Voltage monitor* C I - Commercial Industrial temperature range* 2 0 - PCB revision Cfirst version
* R- RoHS manufacturing process
* -00 - standard u-boot pre-programmed
U0009
dave_user, Administrators
5,190
edits
Retrieved from "https://wiki.dave.eu/index.php/Special:MobileDiff/11576...20317"