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<section begin="History" />
{| style="border-collapse:collapse; "
! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
|-
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
|-
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |x.x.x{{oldid|11600|11600}}| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | First version|-| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|17185|17185}}| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | Added SOCs versions|-| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | {{oldid|17185|19369}}| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | Added explanation NOR SPI size limitation |-| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | Mon YEAR{{oldid|20242|20242}}| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | descriptionAdded XC7020 speed grade 3|-! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" | {{oldid|20317|20317}}! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" | Added XC7014S speed grade 1
|}
<section end="History" />
__FORCETOC__
<section begin="Body" />
==Part number composition==
BORA Lite SOM module part number is identified by the following digit-code table:
{|class="wikitable" style="width:50%"!style="width:10%"|Part number structure!style="width:40%"|Options!style="width:20%"|Description
|-
!XXXFamily|'''DBT'''|Family prefix code |-!SOC
|
* XXXA: XC7Z010 ARM Cortex-A9 667MHz - Speed grade ''-1''* D: XC7Z020 ARM Cortex-A9 667MHz - Speed grade ''-1''* L: XC7Z020 ARM Cortex-A9 667MHz - Speed grade ''-1'' Automotive Grade*J: XC7Z007S ARM Cortex-A9 667MHz - Speed grade ''-1''* F: XC7Z020 ARM Cortex-A9 866MHz - Speed grade ''-3''* K: XC7Z014S ARM Cortex-A9 667MHz - Speed grade ''-1''|These options depends System on XXX. Other versions can be available, please contact [https://www.dave.eu/helpdesk technical support]chip definition (and FPGA speed grade)
|-
!XXXNOR SPI
|
* XXX0: 0MB* 4: 16MB|XXXQUAD SPI NOR flash memory size - The limitation to max 16MB is due to this [https://support.xilinx.com/s/article/57744?language=en_US Errata from Xilinx]. The proposed solution by Xilinx has not been approved by DAVE Embedded Systems
|-
!RAM
|
* 1: 1GB
* 9: 512MB
|DDR3 Memory RAM size
|-
!NAND
|
* 0: 0MB
* 1: 1GB NAND SLC
* 7: 128MB NAND SLC
* 8: 256MB NAND SLC
* 9: 512MB NAND SLC
|Flash memory NAND size
|-
!Boot/Misc
|
* 1: NOR boot
|Boot options
|-
!Temperature range
|
* C - Commercial grade: suitable for 0-70°C envirronmentto70°C* I - Industrial grade: suitable for -40 - to 85°C envirronment* XXX|For the DAVE Embedded Systems' product Temperature Range classification, please find more information at the page [[Products Classification]]
|-
!PCB revision
|
* 0: first version
|PCB release may change for manufacturing purposes (i.e. text fixture adaptation)
|-
|
* R: RoHS compliant
|typically connected to production process and quality
|-
=== Example ===
BORA Lite SOM code '''XXXXXXXXXXXDBTD4111I0R-00'''
* XXX DBT - xxxxxBORA Lite SOM module* X D - xxxxxXC7Z020 ARM Cortex-A9 866MHz - Speed grade ''-1''* 4 - 16MB NOR Flash* 1 - 1GB DDR3* X 1 - xxxxx1GB NAND flash* 1 - NOR boot* I - Industrial temperature range* 0 - PCB first version* R- RoHS manufacturing process* -00 - standard u-XX boot pre- xxxxxprogrammed
----
[[Category:BORA Lite]]