Bureaucrats, dave_user, Administrators
8,226
edits
Changes
no edit summary
<section begin="History" />{| style="border-collapse:collapse; "! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History|- ! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes|-| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|11594|2020/12/01}}| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |First version|-! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" |2023/07/17! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" |Revision of signals connections|}<section end="History" /><section begin="Body" />
An external watchdog timer (WDT), Maxim MAX6373<ref name="MAX6373">https://www.maximintegrated.com/en/products/power/supervisors-voltage-monitors-sequencers/MAX6373.html</ref>), is connected to the PORSTn signal. During normal operation, the microprocessor should repeatedly toggle the watchdog input WDI before the selected watchdog timeout period elapses to demonstrate that the system is processing code properly. If the µP does not provide a valid watchdog input transition before the timeout period expires, the supervisor asserts a watchdog (WDO) output to signal that the system is not executing the desired instructions within the expected time frame. The watchdog output pulse is used to reset the µP.
The default mounting option is depicted in the following figure.
[[File:BORABORA_Lite_reset_scheme-Lite-reset-scheme2.png|thumb|center|700px|Watchdog timer default mounting option]]
WDI is connected to Zynq's PS_MIO15_500 I/O. This signal is available on Bora connectors as PS_MIO15_500 (J1.42).
In any case, when the watchdog is started, the software (bootloader/operating system) must take care of toggling the watchdog trigger pin (WDI) before the timeout expiration.
===Selecting different configurations===
Since WD_SETx signals are routed internally, WDT configuration can be changed by ordering a Custom BORA Lite configuration: please contact our [mailto:sales@dave.eu Sales department] for a Custom BORA Lite order code.
It is also worth mentioning that Zynq integrates a System Watchdog Timer (SWDT) that can optionally generate a reset pulse on PS_MIO15_500 pad if this is configured as SWDT reset. In case such a configuration is of interest, on request, MAX6373 may not be populated. For more details about this option, please contact [mailto:sales@dave.eu Sales Department].
===References===<section end="Body" />