BORA Lite SOM/BORA Lite Hardware/Peripherals/Ethernet
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| Issue Date | Notes | ||
| 2021/08/28 | New documentation layout | ||
On-board Ethernet PHY (Micrel KSZ9031RNX) provides interface signals required to implement the 10/100/1000 Mbps Ethernet port. The transceiver is connected to the Gigabit Ethernet Controller (GEM) through RGMII interface on MIO bank 1, pins PS_MIO[16:27]. For further details (eg: connection and selection of the magnetics), please refer to the Micrel KSZ9031RNX datasheet. The following table describes the interface signals:
| Pin name | Conn. pin | Function | Notes |
|---|---|---|---|
| ETH_TXRX0_P | J1.19 | Media Dependent Interface[0], positive pin | - |
| ETH_TXRX0_M | J1.21 | Media Dependent Interface[0], negative pin | - |
| ETH_TXRX1_P | J1.23 | Media Dependent Interface[1], positive pin | - |
| ETH_TXRX1_M | J1.25 | Media Dependent Interface[1], negative pin | - |
| ETH_TXRX2_P | J1.27 | Media Dependent Interface[2], positive pin | - |
| ETH_TXRX2_M | J1.29 | Media Dependent Interface[2], negative pin | - |
| ETH_TXRX3_P | J1.31 | Media Dependent Interface[3], positive pin | - |
| ETH_TXRX3_M | J1.33 | Media Dependent Interface[3], negative pin | - |
| ETH_LED1 | J1.13 | Activity LED | - |
| ETH_LED2 | J1.15 | Link LED | - |
