Difference between revisions of "BORA Lite SOM/BORA Lite Hardware"
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To register the kit, please send an email to [mailto:helpdesk@dave.eu helpdesk@dave.eu], [[Development_Kits_Identification_Codes|providing the kit P/N and S/N]].}} | To register the kit, please send an email to [mailto:helpdesk@dave.eu helpdesk@dave.eu], [[Development_Kits_Identification_Codes|providing the kit P/N and S/N]].}} | ||
| − | {{PDFManual|nome-som=BORA Lite|link= | + | {{PDFManual|nome-som=BORA Lite|link=https://www.dave.eu/links/p/NEokdArUaHc2r1EL|Descrizione= Hw Manual}} |
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* [[/Power and Reset/Reset scheme and control signals | Reset scheme and control signals]] | * [[/Power and Reset/Reset scheme and control signals | Reset scheme and control signals]] | ||
* [[/Power and Reset/PL_initialization_signals | PL initialization signals]] | * [[/Power and Reset/PL_initialization_signals | PL initialization signals]] | ||
| − | * [ | + | * [[/Power and Reset/System boot | System boot]] |
* [[/Power and Reset/JTAG | JTAG]] | * [[/Power and Reset/JTAG | JTAG]] | ||
| style="width:1%; border-left:solid 0px #ededed;border-right:solid 0px #ededed;border-top:solid 0px #ededed;border-bottom:solid 2px #ffffff; background-color:#ffffff" | | | style="width:1%; border-left:solid 0px #ededed;border-right:solid 0px #ededed;border-top:solid 0px #ededed;border-bottom:solid 2px #ffffff; background-color:#ffffff" | | ||
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|style="width:50%; vertical-align:top;"| | |style="width:50%; vertical-align:top;"| | ||
| + | * [[/Peripherals/Processing System (PS) | Processing System (PS)]] | ||
* [[/Peripherals/Programmable logic (FPGA) | Programmable logic (FPGA)]] | * [[/Peripherals/Programmable logic (FPGA) | Programmable logic (FPGA)]] | ||
* [[/Peripherals/Ethernet#Gigabit_Ethernet | Ethernet]] | * [[/Peripherals/Ethernet#Gigabit_Ethernet | Ethernet]] | ||
* [[/Peripherals/SDIO#SD.2FSDIO | SDIO]] | * [[/Peripherals/SDIO#SD.2FSDIO | SDIO]] | ||
* [[/Peripherals/Quad-SPI#Quad-SPI | SPI]] | * [[/Peripherals/Quad-SPI#Quad-SPI | SPI]] | ||
| + | * [[/Peripherals/Static memory controller| NAND]] | ||
| + | |style="width:50%; vertical-align:top;"| | ||
* [[/Peripherals/I2C0#I.C2.B2C0 | I2C]] | * [[/Peripherals/I2C0#I.C2.B2C0 | I2C]] | ||
| − | |||
* [[/Peripherals/UART#UART1 | UART]] | * [[/Peripherals/UART#UART1 | UART]] | ||
* [[/Peripherals/USB#USB | USB]] | * [[/Peripherals/USB#USB | USB]] | ||
Latest revision as of 15:10, 21 April 2022
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