Difference between revisions of "BORA Lite SOM/BORA Lite Hardware"

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*[[/General Information/Processor and memory subsystem|Processor and memory subsystem]]
 
*[[/General Information/Processor and memory subsystem|Processor and memory subsystem]]
 
*[[/General Information/Hardware versioning and tracking|Hardware versioning and tracking]]
 
*[[/General Information/Hardware versioning and tracking|Hardware versioning and tracking]]
 +
*[[/General Information/Part number composition|BORA Lite SOM Part number composition]]
 
* {{RFQ|product-name=BORA Lite SOM}}
 
* {{RFQ|product-name=BORA Lite SOM}}
  
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To register the kit, please send an email to [mailto:helpdesk@dave.eu helpdesk@dave.eu], [[Development_Kits_Identification_Codes|providing the kit P/N and S/N]].}}
 
To register the kit, please send an email to [mailto:helpdesk@dave.eu helpdesk@dave.eu], [[Development_Kits_Identification_Codes|providing the kit P/N and S/N]].}}
{{PDFManual|nome-som=BORA Lite|link=link_TBD|Descrizione= Hw Manual}}
+
{{PDFManual|nome-som=BORA Lite|link=https://www.dave.eu/links/p/NEokdArUaHc2r1EL|Descrizione= Hw Manual}}
 
|-
 
|-
 
|}
 
|}
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|style="width:20%; border-left:solid 2px #ededed;border-right:solid 2px #ededed;border-top:solid 2px #ededed;border-bottom:solid 2px #ededed; background-color:#ffffff; vertical-align:top"|
 
|style="width:20%; border-left:solid 2px #ededed;border-right:solid 2px #ededed;border-top:solid 2px #ededed;border-bottom:solid 2px #ededed; background-color:#ffffff; vertical-align:top"|
 
* [[/Pinout Table | Connectors and Pinout Table]]
 
* [[/Pinout Table | Connectors and Pinout Table]]
* [[/Pinout_Table#J1_odd_pins_.281_to_203.29 | Pinout Table ODD pins declaration]]
+
* [[/Pinout Table#SODIMM ODD pins declaration | SODIMM ODD pins declaration]]
* [[/Pinout_Table#J1_even_pins_.282_to_204.29 | Pinout Table EVEN pins declaration]]
+
* [[/Pinout Table#SODIMM EVEN pins declaration | SODIMM EVEN pins declaration]]
 
| style="width:1%; border-left:solid 0px #ededed;border-right:solid 0px #ededed;border-top:solid 0px #ededed;border-bottom:solid 2px #ffffff; background-color:#ffffff" |
 
| style="width:1%; border-left:solid 0px #ededed;border-right:solid 0px #ededed;border-top:solid 0px #ededed;border-bottom:solid 2px #ffffff; background-color:#ffffff" |
 
|style="width:20%; border-left:solid 2px #ededed;border-right:solid 2px #ededed;border-top:solid 2px #ededed;border-bottom:solid 2px #ededed; background-color:#ffffff; vertical-align:top"|
 
|style="width:20%; border-left:solid 2px #ededed;border-right:solid 2px #ededed;border-top:solid 2px #ededed;border-bottom:solid 2px #ededed; background-color:#ffffff; vertical-align:top"|
 
* [[/Power and Reset/Power Supply Unit (PSU) and recommended power-up sequence|Power Supply Unit (PSU) and recommended power-up sequence]]
 
* [[/Power and Reset/Power Supply Unit (PSU) and recommended power-up sequence|Power Supply Unit (PSU) and recommended power-up sequence]]
 
* [[/Power and Reset/Reset scheme and control signals | Reset scheme and control signals]]
 
* [[/Power and Reset/Reset scheme and control signals | Reset scheme and control signals]]
 +
* [[/Power and Reset/PL_initialization_signals | PL initialization signals]]
 
* [[/Power and Reset/System boot | System boot]]
 
* [[/Power and Reset/System boot | System boot]]
 
* [[/Power and Reset/JTAG | JTAG]]
 
* [[/Power and Reset/JTAG | JTAG]]
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|-
 
|-
 
|style="width:50%; vertical-align:top;"|
 
|style="width:50%; vertical-align:top;"|
 +
* [[/Peripherals/Processing System (PS) | Processing System (PS)]]
 
* [[/Peripherals/Programmable logic (FPGA) | Programmable logic (FPGA)]]
 
* [[/Peripherals/Programmable logic (FPGA) | Programmable logic (FPGA)]]
* [[/Peripherals/CAN | CAN]]
 
 
* [[/Peripherals/Ethernet#Gigabit_Ethernet | Ethernet]]
 
* [[/Peripherals/Ethernet#Gigabit_Ethernet | Ethernet]]
 
* [[/Peripherals/SDIO#SD.2FSDIO | SDIO]]
 
* [[/Peripherals/SDIO#SD.2FSDIO | SDIO]]
 
* [[/Peripherals/Quad-SPI#Quad-SPI | SPI]]
 
* [[/Peripherals/Quad-SPI#Quad-SPI | SPI]]
* [[/Peripherals/I2C0##I.C2.B2C0 | I2C]]
+
* [[/Peripherals/Static memory controller| NAND]]
 +
|style="width:50%; vertical-align:top;"|
 +
* [[/Peripherals/I2C0#I.C2.B2C0 | I2C]]
 
* [[/Peripherals/UART#UART1 | UART]]
 
* [[/Peripherals/UART#UART1 | UART]]
|style="width:50%; vertical-align:top;"|
 
 
* [[/Peripherals/USB#USB | USB]]
 
* [[/Peripherals/USB#USB | USB]]
* [[/Peripherals/GPIOs | GPIOs]]
 
 
* [[/Peripherals/EEPROM | EEPROM ]]
 
* [[/Peripherals/EEPROM | EEPROM ]]
 
* [[/Peripherals/Real Time Clock | Real Time Clock ]]
 
* [[/Peripherals/Real Time Clock | Real Time Clock ]]

Latest revision as of 15:10, 21 April 2022

BORA Lite SOM HW Manual

BORA Lite TOP view
BORA Lite Block diagram
Sale-tag.png BORA Lite SOM RFQ Request For Quotation



200px-Emblem-important.svg.png

Customers are strongly recommended to register their kits. Registration grants access to reserved material such as source code and additional documentation.

To register the kit, please send an email to helpdesk@dave.eu, providing the kit P/N and S/N.

Pdf-logo.png BORA Lite Hw Manual
PDF Manuals are available only on the latest version.
Checkout the pages' history on wiki for previous releases or contact helpdesk@dave.eu


Connectors and Pinout Power and Reset Peripherals Electrical, Thermal and Mechanical Features