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<section begin="History" />
{| style="border-collapse:collapse; "
!colspan="4" style="width:100%; text-align:left"; border-bottom:solid 2px #ededed"|History
|-
!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Version!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Issue Date!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Notes
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|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|1.0.0|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|Sep 2021|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|belk-4.1.5
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|}
<section end="History" />
__FORCETOC__
<section begin="Body" />
==Release Notes==
{| class="wikitable"
!
!width="300pt"|BELK version
|-
|Release number
|-
|0002
|BoraEVB/BoraXEVB
|ETH1 interface
|Please refer to [[AN-BELK-006:_Enabling_dual_Gigabit_Ethernet_support_on_BoraEVB/BoraXEVB|this application note]] for second Ethernet interface support.<br>For applying the AN on BTELK, the [[BORA_Lite_SOM/BORA_Lite_Evaluation_Kit/Electrical_and_Mechanical_Documents/BORA_Lite_Adapter | BORA Lite adapter]] should be properly modified.<br>For more details please refer to DAVE [mailto:helpdesk@dave.eu Helpdesk]
|-
|0003
|BoraEVB/BoraXEVB
|RTC
|Date/time retention is limited to about 4 hours.
|-
|0004
|BoraEVB/BoraXEVB
|System clock runs slower
|As per [https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841831/CPU+frequency+scaling#Missing%20Features,%20Known%20Issues%20and%20Limitations Xilinx issue], @333MHz (speedgrade -3) system clock is slower then expected
|-
|006
|BoraXEVB
|Watchdog
|It is not possible to configure the watchdog settings using S1, S2 and S3 settings.
The watchdog parameters are fixed on BORA Lite SOM: please contact [mailto:helpdesk@dave.eu Helpdesk] for more information
|-
|007
|BoraXEVB
|LVDS/touchhscreen
|BORA Lite adpater is configured for accessing the PMOD-Aperipheral:<br>the LVDS and touchscreen usage is available only with a proper modification of BORA Lite adapter mounting option.
|}
|-
! Image
! colspan="2" | BELK version 4.1.5
|-
| Platform
|-
| SPL
| [[mirror:bora/belk-4.1.5/belk-4.1.5_bora_mmc_boot5_boralite_mmc_boot.bin|boot.bin]]
|-
| u-boot
| [[mirror:bora/belk-4.1.5/belk-4.1.5_bora_mmc_u5_boralite_mmc_u-boot.img|u-boot.img]]
|-
| Linux kernel