From the software standpoint, [[Bora Embedded Linux Kit (BELK)|Bora Embedded Linux Kit (BELK)]] and [[BoraX_Embedded_Linux_Kit_(BXELK)|BoraX Embedded Linux Kit (BXELK)]] are built on top of Zynq Linux BSP released by Xilinx. Customization Customizations are added to support for the Bora and BoraX platforms, in particular at bootloader and Linux kernel levels. BELK and BXELK share the '''same''' software modules, even if they are based on different hardware platforms.
Reading of [[Host_setup_and_development_flow_(BXELK)|this document]] is strongly recommended to understand the logical structure of the kits and how the software components are related.
The following table details the software modules of BELK/BXELK releases.
*an <code>ext3</code> partition (<code>mmcblk0p2</code>) containing the root file system for the target.
bootscript and root file system are used to boot the target as described in [[BoraX_Embedded_Linux_Kit_(BXELK)BELK/BXELK_Quick_Start_Guide#Target_setup_and_first_boot|this section]].
It is worth remembering that the microSD card is [[System boot and recovery via microSD card (BELK/BXELK)|bootable]] and U-Boot environment is retrieved from (and stored to with <code>saveenv</code>) into the FAT partition as <code>bora.env</code>
== Release notes ==
=== BELK 4.1.2 ===
Updates:
# Added support for MAC programming on [[BELK-TN-010: MAC address programming on OTP|NOR SPI OTP]]
==== Known Limitations ====
{| class="wikitable"
|-
!ID
!Component
!Subsystem
!Description
|-
|0001
|BoraEVB
|External DDR3 bank (BoraEVB only)
|DDR3 bank can be populated on request. For more details please refer to [mailto:sales@dave.eu Sales Department].
|-
|0002
|BoraEVB/BoraXEVB
|ETH1 interface
|Please refer to [[AN-BELK-006:_Enabling_dual_Gigabit_Ethernet_support_on_BoraEVB/BoraXEVB|this application note]] for second Ethernet interface support.
|-
|0003
|BoraEVB/BoraXEVB
|RTC
|Date/time retention is limited to about 4 hours.
|-
|0004
|BoraEVB/BoraXEVB
|System clock runs slower
|As per [https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841831/CPU+frequency+scaling#Missing%20Features,%20Known%20Issues%20and%20Limitations Xilinx issue], @333MHz (speedgrade -3) system clock is slower then expected
|}
=== BELK 4.1.0 ===
Updates:
# Added support for [https://www.dave.eu/products/som/xilinx/zynq-XC7Z010-XC7Z020_boralite BoraLite SOM]
==== Known Limitations ====
{| class="wikitable"
|-
!ID
!Component
!Subsystem
!Description
|-
|0001
|BoraEVB
|External DDR3 bank (BoraEVB only)
|DDR3 bank can be populated on request. For more details please refer to [mailto:sales@dave.eu Sales Department].
|-
|0002
|BoraEVB/BoraXEVB
|ETH1 interface
|Please refer to [[AN-BELK-006:_Enabling_dual_Gigabit_Ethernet_support_on_BoraEVB/BoraXEVB|this application note]] for second Ethernet interface support.
|-
|0003
|BoraEVB/BoraXEVB
|RTC
|Date/time retention is limited to about 4 hours.
|-
|0004
|BoraEVB/BoraXEVB
|System clock runs slower
|As per [https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841831/CPU+frequency+scaling#Missing%20Features,%20Known%20Issues%20and%20Limitations Xilinx issue], @333MHz (speedgrade -3) system clock is slower then expected
|}
=== BELK 4.0.0 / BXELK 2.0.0 ===
<code>export CC=gcc</code>
|-
|0007
|BoraEVB/BoraXEVB
|System clock runs slower
|As per [https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841831/CPU+frequency+scaling#Missing%20Features,%20Known%20Issues%20and%20Limitations Xilinx issue], @333MHz (speedgrade -3) system clock is slower then expected
|-
|}
{| class="wikitable"
|-
|-
!ID
!Component
!Issue
!Description
|-
|0001
|BoraEVB
|External DDR3 bank (BoraEVB only)
|DDR3 bank can be populated on request. For more details please refer to [mailto:sales@dave.eu Sales Department].
|-
|0002
|BoraEVB/BoraXEVB
|ETH1 interface
|Please refer to [[AN-BELK-006:_Enabling_dual_Gigabit_Ethernet_support_on_BoraEVB/BoraXEVB|this application note]] for second Ethernet interface support.
|-
|0003
|BoraEVB/BoraXEVB
|RTC
|Date/time retention is limited to about 4 hours.
|}
=== BELK/BXELK older releases === For BELK/BXELK older releases information, please click on Expand here below (on the right) <div class="mw-collapsible mw-collapsed"> ==== BELK 3.0.1 / BXELK 1.0.0 ====
Updates: added support for BoraX/BoraXEVB evaluation system
(BoraXEVB only) For LCD interfacing, please refer to [[AN-BELK-004:_Interfacing_BoraEVB/BoraXEVB_to_TFT_LCD_display|this application note]].
===== Known Limitations =====
{| class="wikitable"
|}
==== BELK 3.0.0 ====
Updates:
(BoraXEVB only) For LCD interfacing, please refer to [[AN-BELK-004:_Interfacing_BoraEVB/BoraXEVB_to_TFT_LCD_display|this application note]].
===== Known Limitations =====
{| class="wikitable"
|}
==== BELK 2.2.0 ====
Updates:
# Updated U-Boot and Linux versions
===== Known Limitations =====
{| class="wikitable"
|}
==== BELK 2.1.0 ====
Updates:
# First [[Advanced_use_of_Yocto_build_system_(BELK/BXELK)|Yocto Daisy (1.6) BSP Release]]
===== Known Limitations =====
{| class="wikitable"
|}
==== BELK 2.0.0 ====
Updates:
# Updated supported drivers list (please refer to [[Bora_Embedded_Linux_Kit_(BELK)#BELK_software_components | BELK_software_components]])
===== Known Limitations =====
The following table reports the known limitations of this BELK release: