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{{Applies To Bora}}
{{Applies To BoraX}}
{{Applies To BoraLite}}
{{InfoBoxBottom}}
__FORCETOC__
==Introduction==
From the software standpoint, [[Bora Embedded Linux Kit (BELK)|Bora Embedded Linux Kit (BELK)]] and [[BoraX_Embedded_Linux_Kit_(BXELK)|BoraX Embedded Linux Kit (BXELK)]] are built on top of Zynq Linux BSP released by Xilinx. Customization Customizations are added to support for the Bora and BoraX platforms, in particular at bootloader and Linux kernel levels. BELK and BXELK share the '''same''' software modules, even if they are based on different hardware platforms.
Reading of [[Host_setup_and_development_flow_(BXELK)|this document]] is strongly recommended to understand the logical structure of the kits and how the software components are related.
The following table details the software modules of BELK/BXELK releases.
{| class="wikitable"
! colspan="1011" | Kit composition
|-
|'''Release number'''<br>BELK<br>BXELK
|<br>3.0.2<br>1.0.1
|<br>4.0.0<br>2.0.0
|<br>4.1.0<br>4.1.0
|-
|'''Status'''<br>BELK<br>BXELK
|<br>Released<br>n/a
|<br>Released<br>n/a
|<br>Released<br>Released
|<br>Released<br>Released
|<br>Released<br>Released
|<br>January 2017<br>January 2017
|<br>July 2017<br>July 2017
|<br>Jan 2020<br>Jan 2020
|-
|'''Release notes'''<br>BELK<br>BXELK
|<br>[[#BELK_3.0.2_.2F_BXELK_1.0.1 | Ver 3.0.2]]
|<br>[[#BELK_4.0.0_.2F_BXELK_2.0.0 | Ver 4.0.0]]
|<br>[[#BELK_4.1.0 | Ver 4.1.0]]
|-
|'''SOM PCB version'''<br>BELK<br><br>BXELK
|<br>CS020313B/CS020313C<br><br>CS112714B
|<br>CS020313B/CS020313C<br><br>CS112714B
|<br>CS020313B/CS020313C/CS061919<br><br>CS112714B
|--
|'''Supported carrier boards'''<br>BELK<br>BXELK
|<br>[[BoraEVB]]<br>n/a
|<br>[[BoraEVB]]<br>n/a
|<br>[[BoraEVB]]<br>[[BoraXEVB]]
|<br>[[BoraEVB]]<br>[[BoraXEVB]]
|<br>[[BoraEVB]]<br>[[BoraXEVB]]
|2014.07-belk-3.0.2
|2017.01-belk-4.0.1
|2017.01-belk-4.1.1
|-
|'''Linux version'''
|3.17.0-bora-3.0.0
|4.9.0-bora-4.0.0
|4.9.0-bora-4.1.0
|-
|'''Drivers'''
| valign="top" | Gigabit Eth #0<br>UART<br>NOR<br>NAND<br>SD/MMC<br>USB Host/Device<br>RTC<br>CAN<br>I2C
| valign="top" | Gigabit Eth #0<br>UART<br>NOR<br>NAND<br>SD/MMC<br>USB Host/Device<br>RTC<br>CAN<br>I2C
| valign="top" | Gigabit Eth #0<br>UART<br>NOR<br>NAND<br>SD/MMC<br>USB Host/Device<br>RTC<br>CAN<br>I2C<br>[[ConfigID_and_UniqueID | ConfigID]]
| valign="top" | Gigabit Eth #0<br>UART<br>NOR<br>NAND<br>SD/MMC<br>USB Host/Device<br>RTC<br>CAN<br>I2C<br>[[ConfigID_and_UniqueID | ConfigID]]
| valign="top" | Gigabit Eth #0<br>UART<br>NOR<br>NAND<br>SD/MMC<br>USB Host/Device<br>RTC<br>CAN<br>I2C<br>[[ConfigID_and_UniqueID | ConfigID]]
| valign="top" | 2014.4
| valign="top" | 2014.4
| valign="top" | 2017.1
| valign="top" | 2017.1
|-
| valign="top" | Yocto Daisy (1.6)
| valign="top" | Yocto Daisy (1.6)
| valign="top" | Yocto Morty (2.2)
| valign="top" | Yocto Morty (2.2)
|-
|N/A
|belk-4.0.0 (based on Ubuntu 14.04 64 bit)
|belk-4.1.0 (based on Ubuntu 14.04 64 bit)
|}
**Linux kernel: <code>uImage</code>
**Device tree: <code>bora.dtb</code>
* For '''BELK-4.01.0''' or newer and '''BXELK-2.0.0''' or newer:
**U-Boot SPL: <code>boot.bin</code>
**U-Boot: <code>u-boot.img</code>
**Fpga [[BELK-AN-008:_Programming_the_FPGA_Bitstream_with_U-Boot|FPGA Bitstream]]: <code>fpga.bit</code>
**Linux kernel: <code>uImage</code>
**Device tree: <code>bora.dtb</code>}}
! rowspan="2" |Image !! colspan="1" |BELK version !! colspan="1" |BXELK version
|-
| 4.1.0 || 4.1.0|-| mksd.sh || [[mirror:bora/belk-4.1.0/mksd.sh|mksd.sh]] || [[mirror:bora/belk-4.1.0 /mksd.sh|mksd.sh]]| 2-| [[Working_with_the_Yocto_build_system#bootscript|bootscript]] || [[mirror:bora/belk-4.1.0/boot.scr|boot.scr]] || [[mirror:bora/belk-4.1.0 /boot.scr|boot.scr]]
|-
| mksd.sh U-Boot SPL (for uSD boot)|| [[mirror:bora/belk-4.01.0/mksdbelk-4.1.1_bora_mmc_boot.shbin|mksdboot.shbin]] || [[mirror:bora/belk-4.01.0/mksdbelk-4.1.1_borax_mmc_boot.shbin|mksdboot.shbin]]
|-
| bootscript U-Boot SPL (for NOR flash boot)|| [[mirror:bora/belk-4.01.0/bootbelk-4.1.1_bora_qspi_boot.scrbin|boot.scrbin]] || [[mirror:bora/belk-4.01.0/bootbelk-4.1.1_borax_qspi_boot.scrbin|boot.scrbin]]
|-
| U-Boot SPL (for uSD NAND flash boot)<br>(for BoraLite SOM)|| [[mirror:bora/belk-4.01.0/belk-4.01.1_bora_mmc_boot1_bora_nand_boot.bin|boot.bin]] || [[mirror:bora/belk-4.0.0/belk-4.0.1_borax_mmc_boot.bin|boot.bin]]
|-
| U-Boot SPL (for NOR flash uSD boot)|| [[mirror:bora/belk-4.01.0/belk-4.01.1_bora_qspi_boot1_bora_mmc_u-boot.binimg|u-boot.binimg]] || [[mirror:bora/belk-4.01.0/belk-4.01.1_borax_qspi_boot1_borax_mmc_u-boot.binimg|u-boot.binimg]]
|-
| U-Boot (for uSD NOR flash boot) || [[mirror:bora/belk-4.01.0/belk-4.01.1_bora_mmc_u1_bora_qspi_u-boot.img|u-boot.img]] || [[mirror:bora/belk-4.01.0/belk-4.01.1_borax_mmc_u1_borax_qspi_u-boot.img|u-boot.img]]
|-
| U-Boot (for NOR NAND flash boot)<br>(for BoraLite SOM)|| [[mirror:bora/belk-4.01.0/belk-4.01.1_bora_qspi_u1_bora_nand_u-boot.img|u-boot.img]] || [[mirror:bora/belk-4.0.0/belk-4.0.1_borax_qspi_u-boot.img|u-boot.img]]
|-
| Fpga [[BELK-AN-008:_Programming_the_FPGA_Bitstream_with_U-Boot|FPGA Bitstream ]] || [[mirror:bora/belk-4.01.0/belk-4.01.0_bora_fpga0_bora_BASE_fpga.bit|fpga.bit]] || [[mirror:bora/belk-4.01.0/belk-4.01.0_borax_fpga0_borax_BASE__fpga.bit|fpga.bit]]
|-
| Linux kernel || [[mirror:bora/belk-4.01.0/belk-4.01.0_uImage|uImage]] || [[mirror:bora/belk-4.01.0/belk-4.01.0_uImage|uImage]]
|-
| Device tree || [[mirror:bora/belk-4.01.0/belk-4.01.0_bora.dtb|bora.dtb]] || [[mirror:bora/belk-4.01.0/belk-4.01.0_bora.dtb|bora.dtb]]
|-
|Root File System || [[mirror:bora/belk-4.01.0/belk-4.01.0_bora0_dave-image-devel-bora.tar.gzbz2|bora.tar.gzbz2]] || [[mirror:bora/belk-4.01.0/belk-4.01.0_bora0_dave-image-devel-bora.tar.gzbz2|bora.tar.gzbz2]]
|}
| mksd.sh || [[mirror:bora/belk-3.0.2/mksd.sh|mksd.sh]] || [[mirror:bora/bxelk-1.0.1/mksd.sh|mksd.sh]]
|-
| [[Working_with_the_Yocto_build_system#bootscript |bootscript]]|| [[mirror:bora/belk-3.0.2/boot.scr|boot.scr]] || [[mirror:bora/bxelk-1.0.1/boot.scr|boot.scr]]
|-
| FSBL (QSPI) || [[mirror:bora/belk-3.0.2/belk-3.0.0_bora_fsbl.bin|fsbl.bin]] || [[mirror:bora/bxelk-1.0.1/belk-3.0.0_borax_fsbl.bin|fsbl.bin]]
** For '''BELK 4.0.0''' or newer and '''BXELK 2.0.0''' or newer:
***<code>boot.bin</code> u-boot SPL image
***<code>fpga.bit</code> optional Fpga [[BELK-AN-008:_Programming_the_FPGA_Bitstream_with_U-Boot|FPGA bitstream]]
***<code>u-boot.img</code> u-boot image
***U-Boot <code>boot.scr</code> bootscript
*an <code>ext3</code> partition (<code>mmcblk0p2</code>) containing the root file system for the target.
bootscript and root file system are used to boot the target as described in [[BoraX_Embedded_Linux_Kit_(BXELK)BELK/BXELK_Quick_Start_Guide#Target_setup_and_first_boot|this section]].
It is worth remembering that the microSD card is [[System boot and recovery via microSD card (BELK/BXELK)|bootable]] and U-Boot environment is retrieved from (and stored to with <code>saveenv</code>) into the FAT partition as <code>bora.env</code>
== Release notes ==
=== BELK 4.1.0 ===
Updates:
# Added support for [https://www.dave.eu/products/som/xilinx/zynq-XC7Z010-XC7Z020_boralite BoraLite SOM]
==== Known Limitations ====
{| class="wikitable"
|-
!ID
!Component
!Subsystem
!Description
|-
|0001
|BoraEVB
|External DDR3 bank (BoraEVB only)
|DDR3 bank can be populated on request. For more details please refer to [mailto:sales@dave.eu Sales Department].
|-
|0002
|BoraEVB/BoraXEVB
|ETH1 interface
|Please refer to [[AN-BELK-006:_Enabling_dual_Gigabit_Ethernet_support_on_BoraEVB/BoraXEVB|this application note]] for second Ethernet interface support.
|-
|0003
|BoraEVB/BoraXEVB
|RTC
|Date/time retention is limited to about 4 hours.
|-
|0004
|BoraEVB/BoraXEVB
|System clock runs slower
|As per [https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841831/CPU+frequency+scaling#Missing%20Features,%20Known%20Issues%20and%20Limitations Xilinx issue], @333MHz (speedgrade -3) system clock is slower then expected
|}
=== BELK 4.0.0 / BXELK 2.0.0 ===
<code>export CC=gcc</code>
|-
|0007
|BoraEVB/BoraXEVB
|System clock runs slower
|As per [https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841831/CPU+frequency+scaling#Missing%20Features,%20Known%20Issues%20and%20Limitations Xilinx issue], @333MHz (speedgrade -3) system clock is slower then expected
|-
|}
{| class="wikitable"
|-
|-
!ID
!Component
!Issue
!Description
|-
|0001
|BoraEVB
|External DDR3 bank (BoraEVB only)
|DDR3 bank can be populated on request. For more details please refer to [mailto:sales@dave.eu Sales Department].
|-
|0002
|BoraEVB/BoraXEVB
|ETH1 interface
|Please refer to [[AN-BELK-006:_Enabling_dual_Gigabit_Ethernet_support_on_BoraEVB/BoraXEVB|this application note]] for second Ethernet interface support.
|-
|0003
|BoraEVB/BoraXEVB
|RTC
|Date/time retention is limited to about 4 hours.
|}
=== BELK/BXELK older releases === For BELK/BXELK older releases information, please click on Expand here below (on the right) <div class="mw-collapsible mw-collapsed"> ==== BELK 3.0.1 / BXELK 1.0.0 ====
Updates: added support for BoraX/BoraXEVB evaluation system
(BoraXEVB only) For LCD interfacing, please refer to [[AN-BELK-004:_Interfacing_BoraEVB/BoraXEVB_to_TFT_LCD_display|this application note]].
===== Known Limitations =====
{| class="wikitable"
|}
==== BELK 3.0.0 ====
Updates:
(BoraXEVB only) For LCD interfacing, please refer to [[AN-BELK-004:_Interfacing_BoraEVB/BoraXEVB_to_TFT_LCD_display|this application note]].
===== Known Limitations =====
{| class="wikitable"
|}
==== BELK 2.2.0 ====
Updates:
# Updated U-Boot and Linux versions
===== Known Limitations =====
{| class="wikitable"
|}
==== BELK 2.1.0 ====
Updates:
# First [[Advanced_use_of_Yocto_build_system_(BELK/BXELK)|Yocto Daisy (1.6) BSP Release]]
===== Known Limitations =====
{| class="wikitable"
|}
==== BELK 2.0.0 ====
Updates:
# Updated supported drivers list (please refer to [[Bora_Embedded_Linux_Kit_(BELK)#BELK_software_components | BELK_software_components]])
===== Known Limitations =====
The following table reports the known limitations of this BELK release:
|}
==== BELK 1.1.0 ====
Updates:
# Added application note "AMP on Bora"
==== BELK 1.0.0 ====
First official release
</div>
