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|1.0.0
|Apri Apr 2022
|[[BORA_SOM/BELK-L/General/Release_Notes#BELK_4.1.5|4.1.5]]
|First release
=== Reference ===
The BORA and BORA Xpress ethernet and USB PHY reset signals are actually managed by the two MIO pins dedicated to this functionality. The MIO pins are documented in the Power and Reset wiki page for [[BORA_SOM/BORA_Hardware/Power_and_Reset/Reset_scheme_and_control_signals#PS_MIO51_501 PS_MIO51_501_.28Ethernet_PHY_reset.29 | PS MIO51 501]] and [[BORA_SOM/BORA_Hardware/Power_and_Reset/Reset_scheme_and_control_signals#PS_MIO51_500 PS_MIO50_501_.28USB_PHY_reset.29 | PS MIO50 501]] pins.
== Hardware reset using MIO pins ==
The default configuration for the two PHY reset signals is managed - by default - in the BORA and BORA Xpress SOMS using the two dedicated [[BORA_SOM/BORA_Hardware/Peripherals/Processing_System_(PS)| MIO pins]].
=== U-Boot PHY reset ===
=== kernel PHY reset ===
The Linux kernel is assumed to find the two physical transceivers '''already reset'''. So, the hardware reset is not implemented at ''driver nor userspace'' levels.
==== ethernet ====
==== USB ====
For issuing a reset pulse to the USB PHY, a dedicated kernel hacking is has to be realized; implemented: the USB PHY driver to be modified is the ULPI <code>drivers/usb/phy/phy-ulpi.c</code> kernel driver and then the proper BSP modifications have to be evaluated.
An example of a USB driver with the hardware reset capability can be found on <code>drivers/usb/phy/phy-generic.c</code> and the related . The reset management , via device tree property <code>reset-gpios</code> can be used as a reference for implementing the hacking in the ULPI driver.
== Software reset ==
The ethernet PHY - in general - supports a software reset toovia the BCMR register. The MAC kernel driver issues a software reset during the ''phy attach'' to the ethernet device: <pre>ret = phy_write(phydev, MII_BMCR, BMCR_RESET);</pre> in the <code>genphy_soft_reset</code> function.