From an electrical perspective, in regard to the XADC module [[BORA SOM |BORA]], [[BORA Xpress SOM |BORA Xpress]], and [[BORA Lite SOM |BORA Lite]] SoMs implement the same scheme, which is depicted in the following image.

the VREFP pad is internally connected to a 10ppm/°C 1.25V voltage reference .  For what concerns the input range, it is worth to remember that it is independent of the I/O voltage of bank 35 as illustrated in the Xilinx documentation: [[File:Zynq-7000-XADC-input-range.png|center|thumb|600x600px]]