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→Testing the PYNQ Framework
In essence we
* created a new notebook by clicking on the ''New'' button at the top and select ''Python 3''
[[File:PYNQ-jupyter-new-file.png|thumb|center|600px|Creating a new notebook]]
*selected ''Code'' on the top bar and write some Python code
[[File:PYNQ-jupyter-start-writing-python.png|thumb|center|600px|Writing Python code]]* clicked ''Run'' on the top bar to run code on a kernel. /*immagine : jupyter_new_file.pngimmagine : jupyter_start_writing_python.png*/
For more details, please refer to the section [http://www.fpgadeveloper.com/2018/03/how-to-accelerate-a-python-function-with-pynq.html ''Software FIR filter using SciPy''].
*Open a new Vivado project, select "RTL project" and "BORA SOM" as target board
*Create your block design
**Add "FIR compiler" block (included in Vivado default IP) and setup it. To create a new filter block starting from the code c read the paragraph %CREATE A NEW BLOCK IP FROM C CODE%
**Add "AXI direct memory access" block and setup it
**Enable on "ZYNQ7 Processing System" block an "High Performance AXI 32b/64b Slave Ports" on interface HP0
*copy folder in PYNQ target in pynq/overlays/
=====Running Custom Overlays with Generic Driver =====