This example was inspired by the following tutorial: [[https://youtu.be/LoLCtSzj9BU|this tutorial]]. *Open Jupyter Notebook: In order to open the Jupyter Notebook web dashboard, do the following steps:**Open the browser (only Google Chrome is supported)**Go to http://<IP address>:9090 if your board is connected to a computer via static IP address or to http://pynq:9090 if your board is connected to a router on network**Log in with username ''xilinx'' and password ''xilinx''.  [[File:TBD.png|thumb|center|600px|caption]]  # MOVE FILE TO AND FROM JUPYTER NOTEBOOK To access the Pynq home area as a network drive to transfer file to and from the board: - open a file browser and click "Go" > "Enter Location" - insert location smb://192.168.2.99/xilinx - log as "xilinx" with password "xilinx"   # WRITE AND RUN PYTHON FUNCTIONS This section describes how to write and run python code on the web interface. - create a new notebook by clicking on the "New" button at the top and select "Python 3" - select "Code" on top bar and write some Python code - click "Run" on top bar to run code on kernel /*immagine : jupyter_new_file.pngimmagine : jupyter_start_writing_python.png*/ The procedure was tested with a FIR filter from SciPy library applied to a noisy signal.  /* vedi http://www.fpgadeveloper.com/2018/03/how-to-accelerate-a-python-function-with-pynq.html fino al paragrafo "Software FIR filter using SciPy" */   # ACCELERATE A PYTHON FUNCTION # INTROTo accelerate a Python function on the Zynq-7000, PYNQ can load a custom overlay.Overlays are built with Vivado 2018.2 and are composed by: - fpga bitstream (*.bit file) - block design (*.tcl file) The test consisted of the following steps: - First, a FIR filter was generated using the wizard provided by Vivado. - The resulting IP was instantiated in Programmable Logic (PL). - Using Jupyter Notebooks, the Python test code was edited and run. - Two different approaches were used: generic driver and IP-specific driver.  # CREATE A NEW CUSTOM PYNQ OVERLAY // titolo specifico per filtro fir?/* sezione da approfondire */  - /* instruzioni di setup vivado */ - Open a new Vivado project, select "RTL project" and "BORA SOM" as target board - Create your block design - Add "FIR compiler" block (included in Vivado default IP) and setup it. To create a new filter block starting from the code c read the paragraph %CREATE A NEW BLOCK IP FROM C CODE% - Add "AXI direct memory access" block and setup it - Enable on "ZYNQ7 Processing System" block an "High Performance AXI 32b/64b Slave Ports" on interface HP0 - Connect AXIS_DATA bus of AXI and FIR block - "Run Connection Automation" to complete wiring - create Hierarchy of AXI and FIR block named "filter" - export bitstream file running "Generate Bitstream" - export block design using tcl console command "write_bd_tcl </path/name>.tcl" - rename generated files as "<overlay_name>.bit" and "<overlay_name>.tcl" - create folder <overlay_name> and insert generated files - copy folder in PYNQ target in pynq/overlays/  Overlay is ready to use in PYNQ Python console.  /* immagine: jupyter_vivado_filter.png */  # RUN CUSTOM PYNQ OVERLAY WITH GENERIC DRIVER // titolo specifico per filtro fir?/* sezione da approfondire e riscrivere meglio */  - Load Overlay and Xlnx modules from pynq and pynq.lib.dma. - Create Overlay and Xlnk object - you can comunicate directly on dma buffer.  /* vedi http://www.fpgadeveloper.com/2018/03/how-to-accelerate-a-python-function-with-pynq.html paragrafo "Hardware FIR Implementation" */  # RUN CUSTOM PYNQ OVERLAY WITH IP-SPECIFIC DRIVER // titolo specifico per filtro fir?/* sezione da approfondire e riscrivere meglio *//* da testare exportazione con diversi setaggi da vivado per checkhierarchy */  - import DefaultHierarchy from pynq - create a new class for fir filter with a method to comunicate directly on dma buffer - create a checkhierarchy method to check ip contained under "filter" hierarchy  /* vedi http://www.fpgadeveloper.com/2018/03/how-to-accelerate-a-python-function-with-pynq.html paragrafo "Driver for FIR accelerator" */  # CREATE A NEW BLOCK IP FROM C CODE/* sezione da scrivere la prossima settimana */