Changes

Video frames encapsulated in AXI4 streams are then stored - by AXI-VDMAs not shown in the picture - in two independent buffers, both implemented on SDRAM bank #1 (this 16-bit wide bank refers to U14 component of BoraXEVB board). Frames are then retrieved by AXI-VDMAs from these buffers and are forwarded to [[http://www.xilinx.com/products/intellectual-property/ef-di-osd.html|Xilinx On-Screen Display LogiCORE IP block]] (named ''video mixer'' in the diagram) that mixes them. The resulting stream in processed by ''LCD controller #1'' module that converts it to TMDS signals that feed feeding the external monitor.