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{{Applies To Bora}}
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{{WarningMessage|text=This application note was validated against specific versions of the kit only. It may not work with other versions. Supported versions are listed in the ''History'' section.}}
== History ==
The procedure here described was tested with binary files released with BELK 4.0.0 on Bora/BoraEVB platform.
It is worth to remember that there are other techniques available to program the bitstream. See for instance the following links:
* https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841750/Solution+Zynq+PL+Programming
* https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841833/Programming+the+Programmable+Logic
==Programming procedure==
The bitstream file used to test the procedure can be downloaded [https://wiki.dave.eu/index.php/BELK/BXELK_software_components#Downloadable_binary_images here].
By default, the bitstream file is released as <code>.bit</code> file. However, programming tool U-Boot requires the <code>.bin</code> format. Thus, the first thing to do is to convert the bitstream file. Several options are available to do this operation. For example, [https://cloud.dave.eu/public/cdd957 this Python program] can be used as shown in the following box.
<pre class="board-terminal">
E:\tmp\Bora\bit2bin>"c:\Program Files (x86)\python275\python.exe" fpga-bit-to-bin.py --flip belk-4.0.0_bora_fpga.bit belk-4.0.0_bora_fpga.bin