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Since bank #34 is powered at 3.3V (High Range I/O mode), RGMII duty cycle distortion specification is not matched. In case of carrier board designed for production environments, <u>it is recommended to use a lower voltage levels and thus a different PL bank</u>. For more details please see section ''I/O Standard and Placement'' of [http://xgoogle.xilinx.com/search?output=xml_no_dtd&ie=UTF-8&oe=UTF-8&getfields=*&filter=0&site=EntireSite&num=200&client=xilinx&proxystylesheet=xilinx&show_dynamic_navigation=0&allVersions=1&sort=meta:Last%2520Modified%2520Date%3AD%3AED&q=+inmeta:Document%2520Class%3DDocument+inmeta:Product%2520Type%3DIP%2520Cores+inmeta:IP%3DGMII%2520to%2520RGMII ''PG160 GMII to RGMII LogiCORE IP Product Guide''] and [[Power_(Bora)|this page]].
The project archive can be downloaded [httphttps://www.dave.eu/system/files/area-riservata/AN-BELK-006-Enabling-dual-Gigabit.zip here].
===BoraXEVB===
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The project archive can be downloaded [httphttps://www.dave.eu/system/files/area-riservata/AN-BELK-006-Enabling-dual-Gigabit.zip here]
==Enabling dual Ethernet configuration in linux kernel==
To enable dual Ethernet user needs to get the pre-built binaries from this [httphttps://www.dave.eu/system/files/area-riservata/AN-BELK-006-Enabling-dual-Gigabit.zip link]
Alternatively kernel and device tree can be built from sources with the following procedure:
* update Bora kernel repository (as described [[Bora_Embedded_Linux_Kit_(BELK)#Updating_the_repositories_from_BELK_2.1.0_to_BELK_2.2.0|here]])
