a000298_approval, dave_user
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The following picture shows simplified block diagram of the design. In principle the structure of the design is the same of the one described in [[AN-BELK-004:_Interfacing_BoraEVB_to_TFT_LCD_display|AN-BELK-004]].
[[File:An-belk-005-0201.pngjpg|700px]]
LCD is driven by a controller implemented in PL that fetches pixel data from frame buffer and periodically refreshes physical screen. LCD controller provides configuration registers that are mapped in the following address range:
To implement frame buffer, a portion of main SDRAM is used. This area is allocated at runtime by linux frame buffer driver.
Every pixel on the display has 2 possible states, ON (light pixel) or OFF (dark pixel).On the frame buffer, the memory is mapped with 8bit for pixel. A byte of value 0xFF represents a ON pixel, and all the other values (0xFE to 0x00) represent a OFF pixel.
At the following URL the Vivado design is available for download: TBD. Please note that, even if this application note is based on BELK 2.2.0, this design has been implemented with Vivado 2013.4
