a000298_approval, dave_user
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The following picture shows simplified block diagram of the design. In principle the structure of the design is the same of the one described in [[AN-BELK-004:_Interfacing_BoraEVB_to_TFT_LCD_display|AN-BELK-004]].
LCD is driven by a controller implemented in PL that fetches pixel data from frame buffer and periodically refreshes physical screen. LCD controller provides configuration registers that are mapped in the following address range:
