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BoraXEVB
===BoraXEVB===
In case of BoraXEVB, no adapter board is needed. LCD panel is directly connected to J26 connector where PL bank 13's signals implementing LVDS interface are routed (see [[BoraXEVB#Schematics|page 14]] of the schematics). I/O voltage of bank 13 is set to 2.5V by configuring [[BoraXEVB#BANK13_VDDIO_selector_-_JP25|JP25 ]] as follows:shown in the following table.{| class="wikitable" border="1"!Pins!Setting|-|1-2|closed|-|3-4|open|-|5-6|closed|-|7-8|open|-|9-10|open|-|11-12|open|-|}
==Block diagram and Vivado project==
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