Difference between revisions of "AxelEVB-Lite-Adapter (AxelLite)"

From DAVE Developer's Wiki
Jump to: navigation, search
m (J5 - MicroSD)
(28 intermediate revisions by 3 users not shown)
Line 1: Line 1:
{{WorkInProgress}}
 
 
{{InfoBoxTop}}
 
{{InfoBoxTop}}
 
{{AppliesToAxelLite}}
 
{{AppliesToAxelLite}}
Line 15: Line 14:
 
* routes the signals from the AxelLite pins to the AxelEVB-Lite mating connectors
 
* routes the signals from the AxelLite pins to the AxelEVB-Lite mating connectors
  
== Block diagram ==
+
{{ImportantMessage|text=This page provides information for the AxelEVB-Lite Adapter board model S-XLADP0000I1R (BOM 2.0.0), provided with XELK kits version 2.1.0 and above. If you have a board from a previous version of the XELK kit (older than 2.1.0), please contact [mailto:support-axel@dave.eu support-axel@dave.eu].}}
  
 +
The following images show the top and bottom views of the AxelEVB-Lite-Adapter:
 +
 +
[[Image:Axellite-adapter-top.jpg|thumb|none|border|350px|Top view]]
 +
[[Image:Axellite-adapter-bottom.jpg|thumb|none|border|350px|Bottom view]]
  
 
== Connectors' pinout ==
 
== Connectors' pinout ==
Line 30: Line 33:
 
=== J4 - JTAG ===
 
=== J4 - JTAG ===
  
=== J5 - MicroSD ===
+
J4 is a SAMTEC FSI-110-03-G-S connector. The following table reports the connector's pinout:  
 
 
The signals of the SD1 interface are routed to the J5 microSD memory card connector. The following table reports the connector's pinout:
 
  
 
{| class="wikitable"  
 
{| class="wikitable"  
Line 41: Line 42:
 
!Notes
 
!Notes
 
|-
 
|-
|1 ||SD1_DAT2||| DATA[2] || -
+
|1 || DGND || - || -
 
|-
 
|-
|2 ||SD1_DAT3||| Card Detect/DATA[3] || -
+
|2 || JTAG_TCK || - || -
 
|-
 
|-
|3 ||SD1_CMD||| CMD line || -
+
|3 || JTAG_TMS || - || -
 
|-
 
|-
|4 ||ADP_3.3V||| Power Supply || -
+
|4 || JTAG_TDO || - || -
 
|-
 
|-
|5 ||SD1_CLK||| Clock || -
+
|5 || JTAG_TDI || - || -
 
|-
 
|-
|6, 9, 10, 11, 12 ||DGND||| - || -
+
|6 || JTAG_nTRST || - || -
 
|-
 
|-
|7 ||SD1_DAT0||| DATA[0] || -
+
|7 || CPU_PORn || - || -
 
|-
 
|-
|8 ||SD1_DAT1||| DATA[1] || -
+
|8 || N.C. || - || -
 
|-
 
|-
|13 ||ADP_3.3V|| - ||Pull up to 3.3V with 10K Ohm -
+
|9 || N.C. || - || -
 +
|-
 +
|10 || JTAG_VREF || - || -
 
|-
 
|-
 
|}
 
|}
Line 63: Line 66:
 
== Boot mode selection ==
 
== Boot mode selection ==
  
For further details, please refer to [[Boot_options_(AxelLite) | Axel Lite boot options]]
+
S1 is a 2-way dip switch for the boot mode selection (PIN: BOOT_MODE_SEL). The following table reports the available configurations for the two Axel Lite models. For further details, please refer to [[Boot_options_(AxelLite) | Axel Lite boot options]].
 +
 
 +
=== Boot from SD/NAND ===
 +
 
 +
{| class="wikitable"
 +
|-
 +
!Switch
 +
!Position
 +
!Function
 +
!Notes
 +
|-
 +
|S1.1 || N.C. || - || -
 +
|-
 +
|S1.2 || ON || BOOT_MODE_SEL = 0<br>Boot from SD || -
 +
|-
 +
|S1.2 || OFF || BOOT_MODE_SEL = 1<br>Boot from NAND || -
 +
|-
 +
|}
 +
 
 +
=== Boot from SD/SPI NOR ===
 +
 
 +
{| class="wikitable"
 +
|-
 +
!Switch
 +
!Position
 +
!Function
 +
!Notes
 +
|-
 +
|S1.1 || N.C. || - || -
 +
|-
 +
|S1.2 || ON || BOOT_MODE_SEL = 0<br>Boot from SD || -
 +
|-
 +
|S1.2 || OFF || BOOT_MODE_SEL = 1<br>Boot from SPI NOR || -
 +
|-
 +
|}
 +
 
 +
== XELK 2.0.0 ==
 +
 
 +
===Schematics===
 +
==== First release ====
 +
* Orcad: https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214_S.XLADP0000I0R.0.9.1.dsn__0.zip
 +
* PDF: https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214_S.XLADP0000I0R.0.9.1-color.pdf
 +
==== Second release ====
 +
* Orcad: https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214A_S.XLADP0000I0R.1.0.0.dsn__0.zip
 +
* PDF: https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214A_S.XLADP0000I0R.1.0.0-color_0.pdf
 +
 
 +
===BOM===
 +
==== First release ====
 +
* https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214_S.XLADP0000I0R.0.9.1.BOM_.csv__0.zip
 +
==== Second release ====
 +
* https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214A_S.XLADP0000I0R.1.0.0.BOM_.csv__0.zip
 +
 
 +
===Layout===
 +
==== First release ====
 +
* https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214A_assem_view_0.pdf
 +
==== Second release ====
 +
* https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214B_assem_view.pdf
 +
 
 +
== XELK 2.2.0 ==
 +
 
 +
===Schematics===
 +
* Orcad: https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214B_S.XLADP0000I1R.2.0.0.dsn_.zip
 +
* PDF: https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214B_S.XLADP0000I1R.2.0.0.pdf
 +
 
 +
===BOM===
 +
* https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214B_S.XLADP0000I1R.2.0.0.BOM_.csv_.zip
 +
 
 +
===Layout===
 +
* https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214B_assem_view.pdf
 +
 
 +
==CAD Drawings ==
 +
* DXF (2D): https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214B-2D.dxf_.zip
 +
* IDF (3D): https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214B-3D.idf_.zip

Revision as of 12:52, 17 October 2018

Info Box
Axel-lite 02.png Applies to Axel Lite

Introduction[edit | edit source]

Axel Lite requires a dedicated adapter to be plugged to the AxelEVB-Lite carrier board. This adapter:

  • provides the SODIMM socket for the AxelLite SOM
  • provides the following additional features:
    • microSD slot (for SD boot)
    • JTAG connector
    • dip-switch for boot mode selection
  • routes the signals from the AxelLite pins to the AxelEVB-Lite mating connectors


200px-Emblem-important.svg.png

This page provides information for the AxelEVB-Lite Adapter board model S-XLADP0000I1R (BOM 2.0.0), provided with XELK kits version 2.1.0 and above. If you have a board from a previous version of the XELK kit (older than 2.1.0), please contact support-axel@dave.eu.

The following images show the top and bottom views of the AxelEVB-Lite-Adapter:

Top view
Bottom view

Connectors' pinout[edit | edit source]

J6 - SODIMM connector[edit | edit source]

J6 is a TE Connectivity 204-pin SODIMM socket. The pinout matches the Axel Lite pinout.

J1, J2, J3 - AxelEVB-Lite mating connectors[edit | edit source]

J1, J2 and J3 are Hirose FX8C-140S-SV connectors that match the AxelEVB-Lite SOM connectors' pinout.

J4 - JTAG[edit | edit source]

J4 is a SAMTEC FSI-110-03-G-S connector. The following table reports the connector's pinout:

Pin# Pin name Function Notes
1 DGND - -
2 JTAG_TCK - -
3 JTAG_TMS - -
4 JTAG_TDO - -
5 JTAG_TDI - -
6 JTAG_nTRST - -
7 CPU_PORn - -
8 N.C. - -
9 N.C. - -
10 JTAG_VREF - -

Boot mode selection[edit | edit source]

S1 is a 2-way dip switch for the boot mode selection (PIN: BOOT_MODE_SEL). The following table reports the available configurations for the two Axel Lite models. For further details, please refer to Axel Lite boot options.

Boot from SD/NAND[edit | edit source]

Switch Position Function Notes
S1.1 N.C. - -
S1.2 ON BOOT_MODE_SEL = 0
Boot from SD
-
S1.2 OFF BOOT_MODE_SEL = 1
Boot from NAND
-

Boot from SD/SPI NOR[edit | edit source]

Switch Position Function Notes
S1.1 N.C. - -
S1.2 ON BOOT_MODE_SEL = 0
Boot from SD
-
S1.2 OFF BOOT_MODE_SEL = 1
Boot from SPI NOR
-

XELK 2.0.0[edit | edit source]

Schematics[edit | edit source]

First release[edit | edit source]

Second release[edit | edit source]

BOM[edit | edit source]

First release[edit | edit source]

Second release[edit | edit source]

Layout[edit | edit source]

First release[edit | edit source]

Second release[edit | edit source]

XELK 2.2.0[edit | edit source]

Schematics[edit | edit source]

BOM[edit | edit source]

Layout[edit | edit source]

CAD Drawings[edit | edit source]