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{{InfoBoxTop}}
{{AppliesToAxelLite}}
** JTAG connector
** dip-switch for boot mode selection
* routes the signals from the AxelLite pins to the AxelEVB-Lite mating connectors
{{ImportantMessage|text=This page provides information for the AxelEVB-Lite Adapter board model S-XLADP0000I1R (BOM 2.0.0), provided with XELK kits version 2.1.0 and above. If you have a board from a previous version of the XELK kit (older than 2.1.0), please contact [mailto:support-axel@dave.eu support-axel@dave.eu].}}
[[Image:Axellite-adapter-top.jpg|thumb|none|border|350px|Top view]]
[[Image:Axellite-adapter-bottom.jpg|thumb|none|border|350px|Bottom view]]
== Connectors' pinout ==
=== J6 - SODIMM connector ===
J6 is a TE Connectivity 204-pin SODIMM socket. The pinout matches the [[Pinout_(AxelLite) | Axel Lite pinout]].
=== J1, J2, J3 - AxelEVB-Lite mating connectors ===
J1, J2 and J3 are Hirose FX8C-140S-SV connectors that match the [[AxelEVB-Lite#Connectors_pinout | AxelEVB-Lite SOM connectors' pinout]].
=== J4 - JTAG ===
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 || DGND || - || -
|-
|2 || JTAG_TCK || - || -
|-
|3 || JTAG_TMS || - || -
|-
|4 || JTAG_TDO || - || -
|-
|5 || JTAG_TDI || - || -
|-
|6 || JTAG_nTRST || - || -
|-
|7 || CPU_PORn || - || -
|-
|8 || N.C. || - || -
|-
|9 || N.C. || - || -
|-
|10 || JTAG_VREF || - || -
|-
|}
== Boot mode selection ==
S1 is a 2-way dip switch for the boot mode selection (PIN: BOOT_MODE_SEL). The following table reports the available configurations for the two Axel Lite models. For further details, please refer to [[Boot_options_(AxelLite) | Axel Lite boot options]].
=== Boot from SD/NAND ===
{| class="wikitable"
|-
!Switch
!Position
!Function
!Notes
|-
|S1.1 || N.C. || - || -
|-
|S1.2 || ON || BOOT_MODE_SEL = 0<br>Boot from SD || -
|-
|S1.2 || OFF || BOOT_MODE_SEL = 1<br>Boot from NAND || -
|-
|}
=== Boot from SD/SPI NOR ===
{| class="wikitable"
|-
!Switch
!Position
!Function
!Notes
|-
|S1.1 || N.C. || - || -
|-
|S1.2 || ON || BOOT_MODE_SEL = 0<br>Boot from SD || -
|-
|S1.2 || OFF || BOOT_MODE_SEL = 1<br>Boot from SPI NOR || -
|-
|}
== XELK 2.0.0 ==
===Schematics===
==== First release ====
* Orcad: https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214_S.XLADP0000I0R.0.9.1.dsn__0.zip
* PDF: https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214_S.XLADP0000I0R.0.9.1-color.pdf
==== Second release ====
* Orcad: https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214A_S.XLADP0000I0R.1.0.0.dsn__0.zip
* PDF: https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214A_S.XLADP0000I0R.1.0.0-color_0.pdf
===BOM===
==== First release ====
* https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214_S.XLADP0000I0R.0.9.1.BOM_.csv__0.zip
==== Second release ====
* https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214A_S.XLADP0000I0R.1.0.0.BOM_.csv__0.zip
===Layout===
==== First release ====
* https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214A_assem_view_0.pdf
==== Second release ====
* https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214B_assem_view.pdf
== XELK 2.2.0 ==
===Schematics===
* Orcad: https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214B_S.XLADP0000I1R.2.0.0.dsn_.zip
* PDF: https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214B_S.XLADP0000I1R.2.0.0.pdf
===BOM===
* https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214B_S.XLADP0000I1R.2.0.0.BOM_.csv_.zip
===Layout===
* https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214B_assem_view.pdf
==CAD Drawings ==
* DXF (2D): https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214B-2D.dxf_.zip
* IDF (3D): https://www.dave.eu/system/files/area-riservata/axelevb-lite-adapter-CS010214B-3D.idf_.zip
