AxelEVB-Lite
| HOME | SOMs | SBCs | ToloMEO Embedded Assistant |  GET A QUOTE
|
 ONLINE HELPDESK
|
| Roadmap | IoT Services | ML/AI services | Embedded Design Services |
 This page provides information for the AxelEVB-Lite carrier board model S-EVBA1000C1R (BOM 1.0.4), provided with XELK kits version 2.1.0 and above. For AxelEVB-Lite revision 0 manufactured before the release of XELK 2.1.0, please refer to this page. |
|
THIS PAGE IS OBSOLETE, DON'T USE IT AS REFERENCE |
| The new documentation is available here: AXEL_Lite_SOM/AXEL_Lite_Evaluation_Kit | |
Info Box
|
Contents
- 1 Introduction
- 2 Block Diagram
- 3 Features
- 4 Known limitations
- 5 Connectors pinout
- 5.1 J1 - Axel SOM connector
- 5.2 J2 - Axel SOM connector
- 5.3 J3 - Axel SOM connector
- 5.4 J4 - Dacu carrier board connector
- 5.5 J5 - Dacu carrier board connector
- 5.6 Ethernet port ETH - J6
- 5.7 PCI Express - J7
- 5.8 HDMI - J8
- 5.9 LVDS1 - J10
- 5.10 Backlight LCD - J11
- 5.11 J56
- 5.12 CAM interface - J16
- 5.13 MIPI camera connector - J53
- 5.14 USB OTG - J29
- 5.15 SOM Power Voltage Selector - J32
- 5.16 J33
- 5.17 J34
- 5.18 J36
- 5.19 J40
- 5.20 J42
- 5.21 IPU2_CSI1 (Generic Camera in) - J43
- 5.22 EXPANSION CONNECTOR - J44
- 5.23 EXPANSION CONNECTOR - J46
- 5.24 LVDS0 - J48
- 5.25 LVDS0 - J54
- 5.26 IPU1_CSI0 - J19
- 5.27 Boot MicroSD - J52
- 5.28 General purpose SD connector - J55
- 5.29 SPI PMOD - JP17
- 5.30 Pin strip connectors
- 5.30.1 J-PROG-PMIC1
- 5.30.2 J-SEL-PROG1
- 5.30.3 SATA - JP1
- 5.30.4 SOM CONSUMPTION MONITOR - JP2
- 5.30.5 NVCC_CSI selection - JP3
- 5.30.6 NVCC_EIM selection - JP4
- 5.30.7 NVCC_SD3 selection - JP5
- 5.30.8 NVCC_LCD selection - JP6
- 5.30.9 EXPANSION CONNECTOR - JP8
- 5.30.10 EXPANSION CONNECTOR - JP9
- 5.30.11 JP10
- 6 Boot configurations
- 7 Technical documents
Introduction[edit | edit source]
AxelEVB-Lite is a carrier board designed to host AXEL ULTRA and AXEL LITE (through an adapter) SoMs. It exports some specific peripherals connectors and acts as an adaptation board used in combination with Dacu carrier board.
Block Diagram[edit | edit source]
The following picture shows Axel-EVB-Lite's block diagram:
Features[edit | edit source]
- 10/100/1000 Ethernet
- 1x USB OTG,1x USB HOST
- Serial port (RS232)
- HDMI connector
- SATA connector
- PCIe connector
- LVDS connector
- Pin strip expansion connectors for additional peripherals
- 2x 140 pin connectors for Dacu carrier board.
- Support for the following SOMs:
- Axel Ultra
- Axel Lite (through the Axel Lite Adapter)
Known limitations[edit | edit source]
The following table reports the known limitations of the latest version of the carrier board:
| Issue | Description |
|---|---|
Connectors pinout[edit | edit source]
J1 - Axel SOM connector[edit | edit source]
J1 is a Hirose FX8C-140P-SV4 140-pin header connector for the hosted Axel SoM. The following tables reports the connector's pinout:
J1 odd pins (1 to 139)[edit | edit source]
| Pin# | Pin Name | Function | Notes |
|---|---|---|---|
| J1.1 | DGND | Ground | - |
| J1.3 | DI0_DISP_CLK | Digital video: pixel clock | - |
| J1.5 | DI0_PIN2 | Digital video: Hsync | - |
| J1.7 | DI0_PIN3 | Digital video: Vsync | - |
| J1.9 | DI0_PIN4 | Digital video: Contrast | - |
| J1.11 | DI0_PIN15 | Digital video: Data Enable | - |
| J1.13 | DISP0_DAT0 | Digital video: data-bit[0] | - |
| J1.15 | DISP0_DAT1 | Digital video: data-bit[1] | - |
| J1.17 | DISP0_DAT2 | Digital video: data-bit[2] | - |
| J1.19 | DISP0_DAT3 | Digital video: data-bit[3] | - |
| J1.21 | DGND | Ground | - |
| J1.23 | DISP0_DAT4 | Digital video: data-bit[4] | - |
| J1.25 | DISP0_DAT5 | Digital video: data-bit[5] | - |
| J1.27 | DISP0_DAT6 | Digital video: data-bit[6] | - |
| J1.29 | DISP0_DAT7 | Digital video: data-bit[7] | - |
| J1.31 | DISP0_DAT8 | Digital video: data-bit[8] | - |
| J1.33 | DISP0_DAT9 | Digital video: data-bit[9] | - |
| J1.35 | DISP0_DAT10 | Digital video: data-bit[10] | - |
| J1.37 | DISP0_DAT11 | Digital video: data-bit[11] | - |
| J1.39 | DISP0_DAT12 | Digital video: data-bit[12] | - |
| J1.41 | DGND | Ground | - |
| J1.43 | DISP0_DAT13 | Digital video: data-bit[13] | - |
| J1.45 | DISP0_DAT14 | Digital video: data-bit[14] | - |
| J1.47 | DISP0_DAT15 | Digital video: data-bit[15] | - |
| J1.49 | DISP0_DAT16 | Digital video: data-bit[16] | - |
| J1.51 | DISP0_DAT17 | Digital video: data-bit[17] | - |
| J1.53 | DISP0_DAT18 | Digital video: data-bit[18] | - |
| J1.55 | DISP0_DAT19 | Digital video: data-bit[19] | - |
| J1.57 | DISP0_DAT20 | Digital video: data-bit[20] | - |
| J1.59 | DISP0_DAT21 | Digital video: data-bit[21] | - |
| J1.61 | DGND | Ground | - |
| J1.63 | DISP0_DAT22 | Digital video: data-bit[22] | - |
| J1.65 | DISP0_DAT23 | Digital video: data-bit[23] | - |
| J1.67 | WD_SET0 | Watchdog control pin | - |
| J1.69 | WD_SET1 | Watchdog control pin | - |
| J1.71 | WD_SET2 | Watchdog control pin | - |
| J1.73 | USB_OTG_CHDn | N.C. | - |
| J1.75 | USB_OTG_VBUS | USB power supply (+5V) | - |
| J1.77 | USB_OTG_DN | USB Data - | - |
| J1.79 | USB_OTG_DP | USB Data + | - |
| J1.81 | DGND | Ground | - |
| J1.83 | USB_HOST_DP | USB Data + | - |
| J1.85 | USB_HOST_DN | USB Data - | - |
| J1.87 | USB_H1_VBUS | USB power supply (+5V) | - |
| J1.89 | SD1_DAT0 | - | - |
| J1.91 | SD1_DAT1 | - | - |
| J1.93 | SD1_DAT2 | - | - |
| J1.95 | SD1_DAT3 | - | - |
| J1.97 | SD1_CMD | - | - |
| J1.99 | SD1_CLK | - | - |
| J1.101 | DGND | Ground | - |
| J1.103 | TAMPER | CPU Tamper signal | - |
| J1.105 | ETH0_LED1 | yellow led of LAN connector on EVBA (J6) | - |
| J1.107 | ETH0_LED2 | green led of LAN connector on EVBA (J6) | - |
| J1.109 | DGND | Ground | - |
| J1.111 | ETH0_TXRX0_M | Ethernet 0 TD0- | - |
| J1.113 | ETH0_TXRX0_P | Ethernet 0 TD0+ | - |
| J1.115 | DGND | Ground | - |
| J1.117 | ETH0_TXRX1_M | Ethernet 0 TD1- | - |
| J1.119 | ETH0_TXRX1_P | Ethernet 0 TD1+ | - |
| J1.121 | DGND | Ground | - |
| J1.123 | ETH0_TXRX2_M | Ethernet 0 TD2- | - |
| J1.125 | ETH0_TXRX2_P | Ethernet 0 TD2+ | - |
| J1.127 | DGND | Ground | - |
| J1.129 | ETH0_TXRX3_M | Ethernet 0 TD3- | - |
| J1.131 | ETH0_TXRX3_P | Ethernet 0 TD3+ | - |
| J1.133 | DGND | Ground | - |
| J1.135 | RGMII_MDC | - | - |
| J1.137 | RGMII_MDIO | - | - |
| J1.139 | PMIC_VSNVS | - | - |
J1 even pins (2 to 140)[edit | edit source]
| Pin# | Pin Name | Function | Notes |
|---|---|---|---|
| J1.2 | LVDS0_TX0_N | LVDS0 pair0 negative | - |
| J1.4 | LVDS0_TX0_P | LVDS0 pair0 positive | - |
| J1.6 | LVDS0_TX1_N | LVDS0 pair1 negative | - |
| J1.8 | LVDS0_TX1_P | LVDS0 pair1 positive | - |
| J1.10 | DGND | Ground | - |
| J1.12 | LVDS0_TX2_N | LVDS0 pair2 negative | - |
| J1.14 | LVDS0_TX2_P | LVDS0 pair2 positive | - |
| J1.16 | LVDS0_TX3_N | LVDS0 pair3 negative | - |
| J1.18 | LVDS0_TX3_P | LVDS0 pair3 positive | - |
| J1.20 | LVDS0_CLK_N | LVDS0 clock negative | - |
| J1.22 | LVDS0_CLK_P | LVDS0 clock positive | - |
| J1.24 | DGND | Ground | - |
| J1.26 | CSI0_MCLK | - | - |
| J1.28 | DGND | Ground | - |
| J1.30 | CSI0_PIXCLK | - | - |
| J1.32 | CSI0_VSYNC | - | - |
| J1.34 | CSI0_DATA_EN | - | - |
| J1.36 | CSI0_DAT4 | - | - |
| J1.38 | CSI0_DAT5 | - | - |
| J1.40 | CSI0_DAT6 | - | - |
| J1.42 | CSI0_DAT7 | - | - |
| J1.44 | CSI0_DAT8 | I2C bus 1 , DATA | - |
| J1.46 | CSI0_DAT9 | I2C bus 1 , CLOCK | - |
| J1.48 | CSI0_DAT10 | UART1 TX | - |
| J1.50 | DGND | Ground | - |
| J1.52 | CSI0_DAT11 | UART1 RX | - |
| J1.54 | CSI0_DAT12 | - | - |
| J1.56 | CSI0_DAT13 | - | - |
| J1.58 | CSI0_DAT14 | - | - |
| J1.60 | CSI0_DAT15 | - | - |
| J1.62 | CSI0_DAT16 | - | - |
| J1.64 | CSI0_DAT17 | - | - |
| J1.66 | CSI0_DAT18 | - | - |
| J1.68 | CSI0_DAT19 | - | - |
| J1.70 | DGND | Ground | - |
| J1.72 | GPIO_0 | SD Card Detect | - |
| J1.74 | GPIO_1 | WatchDog signal to reset PMIC | - |
| J1.76 | GPIO_2 | General Purpose I/O | Button S2 status |
| J1.78 | GPIO_3/I2C3_SCL | I2C bus 3 , CLOCK | - |
| J1.80 | GPIO_4 | General Purpose I/O | TouchScreen Pendown status<br>Button S4 status |
| J1.82 | GPIO_5 | General Purpose I/O | Button S3 status |
| J1.84 | GPIO_6/I2C3_SDA | I2C bus 3 , DATA | - |
| J1.86 | GPIO_7/FLEXCAN1_H | CAN bus 1 TX | - |
| J1.88 | GPIO_8/FLEXCAN1_L | CAN bus 1 RX | - |
| J1.90 | DGND | Ground | - |
| J1.92 | GPIO_9 | LCD0 Backlight (PWM) | - |
| J1.94 | GPIO_16 | General Purpose I/O | - |
| J1.96 | GPIO_17 | General Purpose I/O | - |
| J1.98 | GPIO_18 | General Purpose I/O | - |
| J1.100 | GPIO_19 | General Purpose I/O | Button S1 status |
| J1.102 | KEY_COL0/ECSPI1_SCLK | SPI bus 1 Clock | - |
| J1.104 | KEY_ROW0/ECSPI1_MOSI | SPI bus 1 Master Out Slave In | - |
| J1.106 | KEY_COL1/ECSPI1_MISO | SPI bus 1 Master In Slave Out | - |
| J1.108 | KEY_ROW1/ECSPI1_SS0 | SPI bus 1 Chip select 0 | - |
| J1.110 | DGND | Ground | - |
| J1.112 | KEY_COL2/ECSP1_SS1 | SPI bus 1 Chip select 1 | - |
| J1.114 | KEY_ROW2 | General Purpose I/O | - |
| J1.116 | KEY_COL3/I2C2_SCL | I2C bus 2 , CLOCK | - |
| J1.118 | KEY_ROW3/I2C2_SDA | I2C bus 2 , DATA | - |
| J1.120 | VGEN4_1V8_I | 1.8V | - |
| J1.122 | NVCC_AXEL_I/O_3.3V/1.8V (BOARD_PGOOD) | 3.3/1.8V | - |
| J1.124 | RTC_VBAT | RTC Battery Power Supply | Battery on DACU board |
| J1.126 | PMIC_LICELL | - | - |
| J1.128 | SD2_CMD | Micro SD cmd | - |
| J1.130 | DGND | Ground | - |
| J1.132 | SD2_CLK | Micro SD clock | - |
| J1.134 | SD2_DATA0 | Micro SD data[0] | - |
| J1.136 | SD2_DATA1 | Micro SD data[1] | - |
| J1.138 | SD2_DATA2 | Micro SD data[2] | - |
| J1.140 | SD2_DATA3 | Micro SD data[3] | - |
J2 - Axel SOM connector[edit | edit source]
J2 is a Hirose FX8C-140P-SV4 140-pin header connector for the hosted Axel SoM. The following tables reports the connector's pinout:
J2 odd pins (1 to 139)[edit | edit source]
| Pin# | Pin Name | Function | Notes |
|---|---|---|---|
| J2.1 | DGND | Ground | - |
| J2.3 | EIM_DA0 | Boot Mode Select | - |
| J2.5 | EIM_DA1 | Boot Mode Select | - |
| J2.7 | EIM_DA2 | Boot Mode Select | - |
| J2.9 | EIM_DA3 | Boot Mode Select | - |
| J2.11 | EIM_DA4 | Boot Mode Select | - |
| J2.13 | EIM_DA5 | Boot Mode Select | - |
| J2.15 | EIM_DA6 | Boot Mode Select | - |
| J2.17 | EIM_DA7 | Boot Mode Select | - |
| J2.19 | EIM_DA8 | Boot Mode Select | - |
| J2.21 | DGND | Ground | - |
| J2.23 | EIM_DA9 | Boot Mode Select | - |
| J2.25 | EIM_DA10 | Boot Mode Select | - |
| J2.27 | EIM_DA11 | Boot Mode Select | - |
| J2.29 | EIM_DA12 | Boot Mode Select | - |
| J2.31 | EIM_DA13 | Boot Mode Select | - |
| J2.33 | EIM_DA14 | Boot Mode Select | - |
| J2.35 | EIM_DA15 | Boot Mode Select | - |
| J2.37 | EIM_D16 | General Purpose I/O | - |
| J2.39 | EIM_D17 | - | - |
| J2.41 | DGND | Ground | - |
| J2.43 | EIM_D18 | - | - |
| J2.45 | EIM_D19 | - | - |
| J2.47 | EIM_D20 | - | - |
| J2.49 | EIM_D21 | - | - |
| J2.51 | EIM_D22 | - | - |
| J2.53 | EIM_D23 | - | - |
| J2.55 | EIM_D24 | UART3 TX | - |
| J2.57 | EIM_D25 | UART3 RX | - |
| J2.59 | EIM_D26 | - | - |
| J2.61 | DGND | Ground | - |
| J2.63 | EIM_D27 | - | - |
| J2.65 | EIM_D28 | - | - |
| J2.67 | EIM_D29 | - | - |
| J2.69 | EIM_D30 | - | - |
| J2.71 | EIM_D31 | - | - |
| J2.73 | EIM_A16 | Boot Mode Select | - |
| J2.75 | EIM_A17 | Boot Mode Select | - |
| J2.77 | EIM_A18 | Boot Mode Select | - |
| J2.79 | EIM_A19 | Boot Mode Select | - |
| J2.81 | DGND | Ground | - |
| J2.83 | EIM_A20 | Boot Mode Select | - |
| J2.85 | EIM_A21 | Boot Mode Select | - |
| J2.87 | EIM_A22 | Boot Mode Select | - |
| J2.89 | EIM_A23 | Boot Mode Select | - |
| J2.91 | EIM_A24 | Boot Mode Select | - |
| J2.93 | EIM_A25 | - | - |
| J2.95 | EIM_LBA | Boot Mode Select | - |
| J2.97 | EIM_OE | SPI bus 2 Master In Slave Out | - |
| J2.99 | EIM_RW | Boot Mode Select<br>SPI bus 2 Chip Select 0 | - |
| J2.101 | DGND | Ground | - |
| J2.103 | EIM_BCLK | - | - |
| J2.105 | EIM_WAIT | Boot Mode Select | - |
| J2.107 | EIM_EB0 | Boot Mode Select | - |
| J2.109 | EIM_EB1 | Boot Mode Select | - |
| J2.111 | EIM_EB2 | Boot Mode Select | - |
| J2.113 | EIM_EB3 | Boot Mode Select | - |
| J2.115 | EIM_CS0 | SPI bus 2 Clock | - |
| J2.117 | EIM_CS1 | SPI bus 2 Master Out Slave In | - |
| J2.119 | DGND | Ground | - |
| J2.121 | PMIC_PROG_VPGM | PMIC Control signal | - |
| J2.123 | PMIC_PROG_GATE_CTRL | PMIC Control signal | - |
| J2.125 | 2V8-4V5_SOM | 2.8V-4.5V Power Supply | - |
| J2.127 | 2V8-4V5_SOM | 2.8V-4.5V Power Supply | - |
| J2.129 | 2V8-4V5_SOM | 2.8V-4.5V Power Supply | - |
| J2.131 | 2V8-4V5_SOM | 2.8V-4.5V Power Supply | - |
| J2.133 | 2V8-4V5_SOM | 2.8V-4.5V Power Supply | - |
| J2.135 | 2V8-4V5_SOM | 2.8V-4.5V Power Supply | - |
| J2.137 | 2V8-4V5_SOM | 2.8V-4.5V Power Supply | - |
| J2.139 | 2V8-4V5_SOM | 2.8V-4.5V Power Supply | - |
J2 even pins (2 to 140)[edit | edit source]
| Pin# | Pin Name | Function | Notes |
|---|---|---|---|
| J2.2 | NANDF_CS0_B | NAND Chip Enable 0 | - |
| J2.4 | NANDF_CS1_B | NAND Chip Enable 1 | - |
| J2.6 | NANDF_CS2_B | NAND Chip Enable 2 | - |
| J2.8 | NANDF_CS3_B | NAND Chip Enable 3 | - |
| J2.10 | DGND | Ground | - |
| J2.12 | NANDF_D0 | NAND Data-bit[0] | - |
| J2.14 | NANDF_D1 | NAND Data-bit[1] | - |
| J2.16 | NANDF_D2 | NAND Data-bit[2] | - |
| J2.18 | NANDF_D3 | NAND Data-bit[3] | - |
| J2.20 | NANDF_D4 | NAND Data-bit[4] | - |
| J2.22 | NANDF_D5 | NAND Data-bit[5] | - |
| J2.24 | NANDF_D6 | NAND Data-bit[6] | - |
| J2.26 | NANDF_D7 | NAND Data-bit[7] | - |
| J2.28 | SD4_CLK/NANDF_WE_B | NAND Write Enable | - |
| J2.30 | DGND | Ground | - |
| J2.32 | SD4_DATA0/NANDF_DQS | - | - |
| J2.34 | SD4_CMD/NANDF_RE_B | NAND Read Enable | - |
| J2.36 | NANDF_ALE | NAND Address Latch Enable | - |
| J2.38 | NANDF_CLE | NAND Command Latch Enable | - |
| J2.40 | NANDF_WP_B | NAND Write Protect | - |
| J2.42 | NANDF_RB0 | NAND Ready/Busy output | - |
| J2.44 | SD4_DATA1 | - | - |
| J2.46 | SD4_DATA2 | - | - |
| J2.48 | SD4_DATA3 | - | - |
| J2.50 | DGND | Ground | - |
| J2.52 | SD4_DATA4 | UART2 RX | - |
| J2.54 | SD4_DATA5 | - | - |
| J2.56 | SD4_DATA6 | - | - |
| J2.58 | SD4_DATA7 | UART2 TX | - |
| J2.60 | PMIC_SDWNB | - | - |
| J2.62 | TEST_MODE | CPU TEST_MODE signal | - |
| J2.64 | RTC_INTn/SQW | RTC interrupt | RTC chip on Axel SOM |
| J2.66 | RTC_RSTn | RTC reset | RTC chip on Axel SOM |
| J2.68 | RTC_32kHz | RTC clock | RTC chip on Axel SOM |
| J2.70 | DGND | Ground | - |
| J2.72 | PMIC_INT_B | PMIC interrupt | Generated by PMIC |
| J2.74 | PMIC_PWRON | Power On from CPU to PMIC | - |
| J2.76 | CPU_ONOFF | CPU ONOFF signal | - |
| J2.78 | CPU_PORn | CPU Power On Reset | - |
| J2.80 | CPU_PMIC_STBY_REQ | CPU PMIC_STBY_REQ signal | - |
| J2.82 | CPU_PMIC_ON_REQ | CPU PMIC_ON_REQ signal | - |
| J2.84 | BOOT_MODE0 | CPU BOOT_MODE0 signal | - |
| J2.86 | BOOT_MODE1 | CPU BOOT_MODE1 signal | - |
| J2.88 | MRSTn | Master Reset | - |
| J2.90 | DGND | Ground | - |
| J2.92 | JTAG_TCK | JTAG | - |
| J2.94 | JTAG_VREF | JTAG | - |
| J2.96 | JTAG_TDI | JTAG | - |
| J2.98 | JTAG_TDO | JTAG | - |
| J2.100 | JTAG_TMS | JTAG | - |
| J2.102 | JTAG_nTRST | JTAG | - |
| J2.104 | NOR_WP | NOR Write Protect | - |
| J2.106 | NVCC_CSI_EXT | CPU NVCC_CSI Power Supply | - |
| J2.108 | DGND | Ground | - |
| J2.110 | NVCC_EIM_EXT | CPU NVCC_EIM Power Supply | - |
| J2.112 | DGND | Ground | - |
| J2.114 | NVCC_SD3_EXT | CPU NVCC_SD3 Power Supply | - |
| J2.116 | DGND | Ground | - |
| J2.118 | NVCC_LCD_EXT | CPU NVCC_LCD Power Supply | - |
| J2.120 | DGND | Ground | - |
| J2.122 | PMIC_PROG_SCL | PMIC Control signal | - |
| J2.124 | PMIC_PROG_SDA | PMIC Control signal | - |
| J2.126 | 2V8-4V5_SOM | 2.8V-4.5V Power Supply | - |
| J2.128 | 2V8-4V5_SOM | 2.8V-4.5V Power Supply | - |
| J2.130 | 2V8-4V5_SOM | 2.8V-4.5V Power Supply | - |
| J2.132 | 2V8-4V5_SOM | 2.8V-4.5V Power Supply | - |
| J2.134 | 2V8-4V5_SOM | 2.8V-4.5V Power Supply | - |
| J2.136 | 2V8-4V5_SOM | 2.8V-4.5V Power Supply | - |
| J2.138 | 2V8-4V5_SOM | 2.8V-4.5V Power Supply | - |
| J2.140 | 2V8-4V5_SOM | 2.8V-4.5V Power Supply | - |
J3 - Axel SOM connector[edit | edit source]
J3 is a Hirose FX8C-140P-SV4 140-pin header connector for the hosted Axel SoM. The following tables reports the connector's pinout:
J3 odd pins (1 to 139)[edit | edit source]
| Pin# | Pin Name | Function | Notes |
|---|---|---|---|
| J3.1 | SD3_CLK | SD3 Clock | - |
| J3.3 | DGND | Ground | - |
| J3.5 | SD3_CMD | SD3 Cmd | - |
| J3.7 | SD3_RST | General Purpose I/O | - |
| J3.9 | DGND | Ground | - |
| J3.11 | SD3_DATA0 | SD3 data[0] | - |
| J3.13 | SD3_DATA1 | SD3 data[1] | - |
| J3.15 | SD3_DATA2 | SD3 data[2] | - |
| J3.17 | SD3_DATA3 | SD3 data[3] | - |
| J3.19 | SD3_DATA4 | SD3 data[4] | - |
| J3.21 | SD3_DATA5 | SD3 data[5] | - |
| J3.23 | SD3_DATA6 | SD3 data[6] | - |
| J3.25 | SD3_DATA7 | SD3 data[7] | - |
| J3.27 | DGND | Ground | - |
| J3.29 | MLB_SN | - | - |
| J3.31 | MLB_SP | - | - |
| J3.33 | DGND | Ground | - |
| J3.35 | MLB_CN | - | - |
| J3.37 | MLB_CP | - | - |
| J3.39 | DGND | Ground | - |
| J3.41 | MLB_DN | - | - |
| J3.43 | MLB_DP | - | - |
| J3.45 | DGND | Ground | - |
| J3.47 | SATA_RXN | Sata RX - | - |
| J3.49 | SATA_RXP | Sata RX+ | - |
| J3.51 | DGND | Ground | - |
| J3.53 | SATA_TXN | Sata TX - | - |
| J3.55 | SATA_TXP | Sata TX+ | - |
| J3.57 | DGND | Ground | - |
| J3.59 | CPU_RGMII_TXC_CONN | - | - |
| J3.61 | DGND | Ground | - |
| J3.63 | CPU_RGMII_TD0_CONN | - | - |
| J3.65 | CPU_RGMII_TD1_CONN | - | - |
| J3.67 | CPU_RGMII_TD2_CONN | - | - |
| J3.69 | CPU_RGMII_TD3_CONN | - | - |
| J3.71 | CPU_RGMII_TX_CTL_CONN | - | - |
| J3.73 | DGND | Ground | - |
| J3.75 | CPU_RGMII_RXC_CONN | - | - |
| J3.77 | DGND | Ground | - |
| J3.79 | CPU_RGMII_RD0_CONN | - | - |
| J3.81 | CPU_RGMII_RD1_CONN | - | - |
| J3.83 | CPU_RGMII_RD2_CONN | - | - |
| J3.85 | CPU_RGMII_RD3_CONN | - | - |
| J3.87 | CPU_RGMII_RX_CTL_CONN | - | - |
| J3.89 | DGND | Ground | - |
| J3.91 | ETH0_CLK125_NDO | - | - |
| J3.93 | DGND | Ground | - |
| J3.95 | ETH0_INTn | Interrupt output from Ethernet transceiver | - |
| J3.97 | ENET_TX_EN/GPIO1_IO28 | Ethernet transceiver: chip reset | - |
| J3.99 | ENET_CRS_DV//SW2_1.8V/3.3V | - | - |
| J3.101 | ENET_REF_CLK/VDDCORE | - | - |
| J3.103 | ENET_RX_ER//VDDSOC | - | - |
| J3.105 | ENET_RXD0//DDR_1V5 | - | - |
| J3.107 | ENET_RXD1 | - | - |
| J3.109 | ENET_TXD0//BB_3.3V/2.5V | - | - |
| J3.111 | ENET_TXD1//1V2_ETH | - | - |
| J3.113 | KEY_COL4//VDDHIGH_VPH | USB OTG control signal | - |
| J3.115 | KEY_ROW4//VDDSOC_CAP | USB OTG control signal | - |
| J3.117 | WDT_WDI//VDDPU | Watchdog input | - |
| J3.119 | VDD_ARM23_CAP//VGEN4_1V8 | Power Supply signal | - |
| J3.121 | VDD_ARM01_CAP//VGEN5_2V8//VDD_VBUS_CAP | Power Supply signal | - |
| J3.123 | VDD_SNVS_CAP//VGEN3_2V5//NVCC_PLL_OUT | Power Supply signal | - |
| J3.125 | VGEN1 | Power Supply signal | - |
| J3.127 | VGEN2 | Power Supply signal | - |
| J3.129 | VGEN6 | Power Supply signal | - |
| J3.131 | SW4_xV/1.8V | Power Supply signal | - |
| J3.133 | PMIC_SWBST_SUPPLY | Power Supply signal | - |
| J3.135 | PMIC_SWBST_SUPPLY | Power Supply signal | - |
| J3.137 | PMIC_SWBST_SUPPLY | Power Supply signal | - |
| J3.139 | DGND | Ground | - |
J3 even pins (2 to 140)[edit | edit source]
| Pin# | Pin Name | Function | Notes |
|---|---|---|---|
| J3.2 | DGND | Ground | - |
| J3.4 | CSI_CLK0M | - | - |
| J3.6 | CSI_CLK0P | - | - |
| J3.8 | DGND | Ground | - |
| J3.10 | CSI_D0M | - | - |
| J3.12 | CSI_D0P | - | - |
| J3.14 | DGND | Ground | - |
| J3.16 | CSI_D1M | - | - |
| J3.18 | CSI_D1P | - | - |
| J3.20 | DGND | Ground | - |
| J3.22 | CSI_D2M | - | - |
| J3.24 | CSI_D2P | - | - |
| J3.26 | DGND | Ground | - |
| J3.28 | CSI_D3M | - | - |
| J3.30 | CSI_D3P | - | - |
| J3.32 | DGND | Ground | - |
| J3.34 | DSI_CLK0M | - | - |
| J3.36 | DSI_CLK0P | - | - |
| J3.38 | DGND | Ground | - |
| J3.40 | DSI_D0M | - | - |
| J3.42 | DSI_D0P | - | - |
| J3.44 | DGND | Ground | - |
| J3.46 | DSI_D1M | - | - |
| J3.48 | DSI_D1P | - | - |
| J3.50 | DGND | Ground | - |
| J3.52 | LVDS1_TX0_N | LVDS1 TX0 - | - |
| J3.54 | LVDS1_TX0_P | LVDS1 TX0 + | - |
| J3.56 | DGND | Ground | - |
| J3.58 | LVDS1_TX1_N | LVDS1 TX1 - | - |
| J3.60 | LVDS1_TX1_P | LVDS1 TX1 + | - |
| J3.62 | DGND | Ground | - |
| J3.64 | LVDS1_TX2_N | LVDS1 TX2 - | - |
| J3.66 | LVDS1_TX2_P | LVDS1 TX2 + | - |
| J3.68 | DGND | Ground | - |
| J3.70 | LVDS1_CLK_N | LVDS1 Clock - | - |
| J3.72 | LVDS1_CLK_P | LVDS1 Clock + | - |
| J3.74 | DGND | Ground | - |
| J3.76 | LVDS1_TX3_N | LVDS1 TX3 - | - |
| J3.78 | LVDS1_TX3_P | LVDS1 TX3 + | - |
| J3.80 | DGND | Ground | - |
| J3.82 | HDMI_CLKN | HDMI Clock - | - |
| J3.84 | HDMI_CLKP | HDMI Clock + | - |
| J3.86 | DGND | Ground | - |
| J3.88 | HDMI_D0N | HDMI D0 - | - |
| J3.90 | HDMI_D0P | HDMI D0 + | - |
| J3.92 | DGND | Ground | - |
| J3.94 | HDMI_D1N | HDMI D1 - | - |
| J3.96 | HDMI_D1P | HDMI D1+ | - |
| J3.98 | DGND | Ground | - |
| J3.100 | HDMI_D2N | HDMI D2 - | - |
| J3.102 | HDMI_D2P | HDMI D2 + | - |
| J3.104 | DGND | Ground | - |
| J3.106 | HDMI_CEC_IN | HDMI CE_REMOTE | - |
| J3.108 | HDMI_HPD | HDMI Hot Plug Detect | - |
| J3.110 | DGND | Ground | - |
| J3.112 | CLK1_N | PCI Reference Clock - | - |
| J3.114 | CLK1_P | PCI Reference Clock + | - |
| J3.116 | DGND | Ground | - |
| J3.118 | CLK2_N | - | - |
| J3.120 | CLK2_P | - | - |
| J3.122 | DGND | Ground | - |
| J3.124 | PCIE_RXN | PCI Express RX - | - |
| J3.126 | PCIE_RXP | PCI Express RX + | - |
| J3.128 | DGND | Ground | - |
| J3.130 | PCIE_TXN | PCI Express TX - | - |
| J3.132 | PCIE_TXP | PCI Express TX + | - |
| J3.134 | DGND | Ground | - |
| J3.136 | PMIC_5V | PMIC 5V Power Supply | - |
| J3.138 | PMIC_5V | PMIC 5V Power Supply | - |
| J3.140 | DGND | Ground | - |
J4 - Dacu carrier board connector[edit | edit source]
J4 is a Hirose FX8C-140S-SV5 140-pin receptacle for the connection to the Dacu carrier bord. The following tables reports the connector's pinout:
J4 odd pins (1 to 139)[edit | edit source]
| Pin# | Pin Name | Function | Notes |
|---|---|---|---|
| J4.1 | DGND | Ground | - |
| J4.3 | DGND | Ground | - |
| J4.5 | N.C. | - | - |
| J4.7 | EIM_D25 | UART3 RX | - |
| J4.9 | RTC_VBAT/PMIC_LICELL | RTC Battery Power Supply | - |
| J4.11 | N.C. | - | - |
| J4.13 | DGND | Ground | - |
| J4.15 | ADC0_IN | Touchscreen Controller: in1 | |
| J4.17 | N.C. | - | - |
| J4.19 | N.C. | - | - |
| J4.21 | N.C. | - | - |
| J4.23 | N.C. | - | - |
| J4.25 | SD3_DATA6 | - | - |
| J4.27 | SD3_DATA7 | - | - |
| J4.29 | DISP0_DAT22 | Digital video: data-bit[22] | [Mount option] |
| J4.31 | DISP0_DAT23 | Digital video: data-bit[23] | [Mount option] |
| J4.33 | DISP0_DAT19 | Digital video: data-bit[19] | [Mount option] |
| J4.35 | DGND | Ground | - |
| J4.37 | N.C. | - | - |
| J4.39 | TSC_XP | Touchscreen Controller: X+ | |
| J4.41 | TSC_XM | Touchscreen Controller: X- | |
| J4.43 | TSC_YP | Touchscreen Controller: Y+ | |
| J4.45 | TSC_YM | Touchscreen Controller: Y- | |
| J4.47 | DISP0_DAT17 | Digital video: data-bit[17] | - |
| J4.49 | DISP0_DAT15 | Digital video: data-bit[15] | - |
| J4.51 | DISP0_DAT13 | Digital video: data-bit[13] | - |
| J4.53 | DISP0_DAT11 | Digital video: data-bit[11] | - |
| J4.55 | DISP0_DAT9 | Digital video: data-bit[9] | - |
| J4.57 | DISP0_DAT7 | Digital video: data-bit[7] | - |
| J4.59 | DISP0_DAT5 | Digital video: data-bit[5] | - |
| J4.61 | DISP0_DAT3 | Digital video: data-bit[3] | - |
| J4.63 | DGND | Ground | - |
| J4.65 | DISP0_DAT1 | Digital video: data-bit[1] | - |
| J4.67 | N.C. | - | - |
| J4.69 | DI0_PIN3 | Digital video: Vsync | - |
| J4.71 | DI0_DISP_CLK | Digital video: pixel clock | - |
| J4.73 | N.C. | - | - |
| J4.75 | N.C. | - | - |
| J4.77 | N.C. | - | - |
| J4.79 | N.C. | - | - |
| J4.81 | N.C. | - | - |
| J4.83 | N.C. | - | - |
| J4.85 | N.C. | - | - |
| J4.87 | N.C. | - | - |
| J4.89 | DGND | Ground | - |
| J4.91 | N.C. | - | - |
| J4.93 | N.C. | - | - |
| J4.95 | N.C. | - | - |
| J4.97 | N.C. | - | - |
| J4.99 | N.C. | - | - |
| J4.101 | N.C. | - | - |
| J4.103 | N.C. | - | - |
| J4.105 | N.C. | - | - |
| J4.107 | N.C. | - | - |
| J4.109 | N.C. | - | - |
| J4.111 | N.C. | - | - |
| J4.113 | DGND | Ground | - |
| J4.115 | N.C. | - | - |
| J4.117 | SD3_DATA2 | SD3 data[2] | - |
| J4.119 | NC | - | - |
| J4.121 | NC | - | - |
| J4.123 | NC | - | - |
| J4.125 | NC | - | - |
| J4.127 | NC | ||
| J4.129 | SD3_DATA5 | SD3 data[5] | |
| J4.131 | N.C. | - | - |
| J4.133 | N.C. | - | - |
| J4.135 | NC | - | - |
| J4.137 | Nc | - | - |
| J4.139 | DGND | Ground | - |
J4 even pins (2 to 140)[edit | edit source]
| Pin# | Pin Name | Function | Notes |
|---|---|---|---|
| J4.2 | DGND | Ground | - |
| J4.4 | DGND | Ground | - |
| J4.6 | N.C. | - | - |
| J4.8 | EIM_D24 | UART3 TX | - |
| J4.10 | N.C. | - | - |
| J4.12 | N.C. | - | - |
| J4.14 | N.C. | - | - |
| J4.16 | N.C. | - | - |
| J4.18 | DISP0_DAT18 | Digital video: data-bit[21] | [Mount option] |
| J4.20 | N.C. | - | - |
| J4.22 | N.C. | - | - |
| J4.24 | DISP0_DAT21 | Digital video: data-bit[21] | [Mount option] |
| J4.26 | DISP0_DAT20 | Digital video: data-bit[20] | [Mount option] |
| J4.28 | DGND | Ground | - |
| J4.30 | N.C. | - | - |
| J4.32 | N.C. | - | - |
| J4.34 | KEY_ROW2 | General Purpose I/O | - |
| J4.36 | SD4_DATA3 | - | - |
| J4.38 | N.C. | - | - |
| J4.40 | N.C. | - | - |
| J4.42 | N.C. | - | - |
| J4.44 | N.C. | - | - |
| J4.46 | DISP0_DAT16 | Digital video: data-bit[16] | |
| J4.48 | DISP0_DAT14 | Digital video: data-bit[14] | |
| J4.50 | DISP0_DAT12 | Digital video: data-bit[12] | |
| J4.52 | DGND | Ground | - |
| J4.54 | DISP0_DAT10 | Digital video: data-bit[10] | - |
| J4.56 | DISP0_DAT8 | Digital video: data-bit[8] | - |
| J4.58 | DISP0_DAT6 | Digital video: data-bit[6] | - |
| J4.60 | DISP0_DAT4 | Digital video: data-bit[4] | - |
| J4.62 | DISP0_DAT21 | Digital video: data-bit[21] | - |
| J4.64 | DISP0_DAT0 | Digital video: data-bit[0] | - |
| J4.66 | DI0_PIN15 | Digital video: Data Enable | - |
| J4.68 | DI0_PIN2 | Digital video: Hsync | - |
| J4.70 | SD4_DATA2 | - | - |
| J4.72 | N.C. | - | - |
| J4.74 | N.C. | - | - |
| J4.76 | DGND | Ground | - |
| J4.78 | N.C. | - | - |
| J4.80 | N.C. | - | - |
| J4.82 | N.C. | - | - |
| J4.84 | N.C. | - | - |
| J4.86 | N.C. | - | - |
| J4.88 | N.C. | - | - |
| J4.90 | N.C. | - | - |
| J4.92 | N.C. | - | - |
| J4.94 | N.C. | - | - |
| J4.96 | GPIO_7/FLEXCAN_H | CAN bus 1 TX | - |
| J4.98 | GPIO_8/FLEXCAN_L | CAN bus 1 RX | - |
| J4.100 | DGND | Ground | - |
| J4.102 | N.C. | - | - |
| J4.104 | N.C. | - | - |
| J4.106 | N.C. | - | - |
| J4.108 | N.C. | - | - |
| J4.110 | N.C. | - | - |
| J4.112 | N.C. | - | - |
| J4.114 | N.C. | - | - |
| J4.116 | N.C. | - | - |
| J4.118 | SD3_DATA3 | SD3 data[3] | - |
| J4.120 | N.C. | - | - |
| J4.122 | N.C. | - | - |
| J4.124 | N.C. | - | - |
| J4.126 | DGND | Ground | - |
| J4.128 | SD3_CLK | SD3 Clock | - |
| J4.130 | SD3_CMD | SD3 Cmd | - |
| J4.132 | SD3_DATA0 | SD3 data[0] | - |
| J4.134 | SD3-DATA1 | SD3 data[1] | - |
| J4.136 | GPIO_3/I2C3_SCL | I2C bus 3 , CLOCK | - |
| J4.138 | GPIO_6/I2C3_SDA | I2C bus 3 , DATA | - |
| J4.140 | DGND | Ground | - |
J5 - Dacu carrier board connector[edit | edit source]
J5 is a Hirose FX8C-140S-SV5 140-pin receptacle for the connection to the Dacu carrier bord. The following tables reports the connector's pinout:
J5 odd pins (1 to 139)[edit | edit source]
| Pin# | Pin Name | Function | Notes |
|---|---|---|---|
| J5.1 | 3.3V_DACU | 3.3V DACU Power Supply | - |
| J5.3 | DGND | Ground | - |
| J5.5 | N.C. | - | - |
| J5.7 | N.C. | - | - |
| J5.9 | N.C. | - | - |
| J5.11 | N.C. | - | - |
| J5.13 | N.C. | - | - |
| J5.15 | N.C. | - | - |
| J5.17 | N.C. | - | - |
| J5.19 | N.C. | - | - |
| J5.21 | N.C. | - | - |
| J5.23 | N.C. | - | - |
| J5.25 | N.C. | - | - |
| J5.27 | N.C. | - | - |
| J5.29 | N.C. | - | - |
| J5.31 | N.C. | - | - |
| J5.33 | USB_H1_VBUS | USB power supply (+5V) | - |
| J5.35 | 3.3V_DACU | 3.3V DACU Power Supply | - |
| J5.37 | DGND | Ground | - |
| J5.39 | 5V_DACU | 5V DACU Power Supply | - |
| J5.41 | 5V_DACU | 5V DACU Power Supply | - |
| J5.43 | NVCC_AXEL_I/O_3.3V/1.8V | 3.3/1.8V | - |
| J5.45 | 5V_DACU | 5V DACU Power Supply | - |
| J5.47 | 5V_DACU | 5V DACU Power Supply | - |
| J5.49 | 5V_DACU | 5V DACU Power Supply | - |
| J5.51 | N.C. | - | - |
| J5.53 | N.C. | - | - |
| J5.55 | N.C. | - | - |
| J5.57 | N.C. | - | - |
| J5.59 | N.C. | - | - |
| J5.61 | N.C. | - | - |
| J5.63 | AUD4_TXFS | - | - |
| J5.65 | 3.3V_DACU | 3.3V DACU Power Supply | - |
| J5.67 | DGND | Ground | - |
| J5.69 | EIM_CS0 | SPI bus 2 Clock | - |
| J5.71 | GPIO_0 | SD Card Detect | - |
| J5.73 | EIM_RW | Boot Mode Select<br>SPI bus 2 Chip Select 0 | - |
| J5.75 | DI0_PIN4 | - | - |
| J5.77 | SD4_DATA0 | - | - |
| J5.79 | EIM_D23 | - | - |
| J5.81 | DISP0_DAT18 | - | - |
| J5.83 | DISP0_DAT19 | - | - |
| J5.85 | N.C. | - | - |
| J5.87 | N.C. | - | - |
| J5.89 | N.C. | - | - |
| J5.91 | N.C. | - | - |
| J5.93 | EIM_D20 | - | - |
| J5.95 | N.C. | - | - |
| J5.97 | EIM_LBA | Boot Mode Select | - |
| J5.99 | N.C. | - | - |
| J5.101 | 3.3V_DACU | 3.3V DACU Power Supply | - |
| J5.103 | DGND | Ground | - |
| J5.105 | JTAG_TDI | JTAG | - |
| J5.107 | JTAG_TMS | JTAG | - |
| J5.109 | CPU_PORn | CPU Power On Reset | - |
| J5.111 | N.C. | - | - |
| J5.113 | N.C. | - | - |
| J5.115 | N.C. | - | - |
| J5.117 | N.C. | - | - |
| J5.119 | N.C. | - | - |
| J5.121 | SD4_DATA7 | UART2 TX | - |
| J5.123 | SD4_DATA5 | - | - |
| J5.125 | N.C. | - | - |
| J5.127 | N.C. | - | - |
| J5.129 | N.C. | - | - |
| J5.131 | N.C. | - | - |
| J5.133 | N.C. | - | - |
| J5.135 | N.C. | - | - |
| J5.137 | N.C. | - | - |
| J5.139 | DGND | Ground | - |
J5 even pins (2 to 140)[edit | edit source]
| Pin# | Pin Name | Function | Notes |
|---|---|---|---|
| J5.2 | DGND | Ground | - |
| J5.4 | N.C. | - | - |
| J5.6 | N.C. | - | - |
| J5.8 | N.C. | - | - |
| J5.10 | N.C. | - | - |
| J5.12 | N.C. | - | - |
| J5.14 | N.C. | - | - |
| J5.16 | N.C. | - | - |
| J5.18 | N.C. | - | - |
| J5.20 | DGND | Ground | - |
| J5.22 | N.C. | - | - |
| J5.24 | N.C. | - | - |
| J5.26 | N.C. | - | - |
| J5.28 | N.C. | - | - |
| J5.30 | N.C. | - | - |
| J5.32 | N.C. | - | - |
| J5.34 | N.C. | - | - |
| J5.36 | N.C. | - | - |
| J5.38 | N.C. | - | - |
| J5.40 | N.C. | - | - |
| J5.42 | N.C. | - | - |
| J5.44 | N.C. | - | - |
| J5.46 | N.C. | - | - |
| J5.48 | N.C. | - | - |
| J5.50 | N.C. | - | - |
| J5.52 | N.C. | - | - |
| J5.54 | DGND | Ground | - |
| J5.56 | N.C. | - | - |
| J5.58 | N.C. | - | - |
| J5.60 | N.C. | - | - |
| J5.62 | N.C. | - | - |
| J5.64 | N.C. | - | - |
| J5.66 | N.C. | - | - |
| J5.68 | AUD4_TXC | - | - |
| J5.70 | AUD4_RXD | - | - |
| J5.72 | EIM_OE | SPI bus 2 Master In Slave Out | - |
| J5.74 | AUD4_TXD | - | - |
| J5.76 | EIM_CS1 | SPI bus 2 Master Out Slave In | - |
| J5.78 | N.C. | - | - |
| J5.80 | N.C. | - | - |
| J5.82 | DGND | Ground | - |
| J5.84 | N.C. | - | - |
| J5.86 | N.C. | - | - |
| J5.88 | N.C. | - | - |
| J5.90 | N.C. | - | - |
| J5.92 | N.C. | - | - |
| J5.94 | N.C. | - | - |
| J5.96 | JTAG_TDO | JTAG | - |
| J5.98 | JTAG_TCK | JTAG | - |
| J5.100 | JTAG_nTRST | JTAG | - |
| J5.102 | MRSTn | Master Reset | - |
| J5.104 | EIM_D19 | - | - |
| J5.106 | KEY_COL3/I2C2_SCL | I2C bus 2 , CLOCK | - |
| J5.108 | KEY_ROW3/I2C2_SDA | I2C bus 2 , DATA | - |
| J5.110 | N.C. | - | - |
| J5.112 | N.C. | - | - |
| J5.114 | N.C. | - | - |
| J5.116 | DGND | Ground | - |
| J5.118 | N.C. | - | - |
| J5.120 | CSI0_DAT10 | UART1 TX | - |
| J5.122 | CSI0_DAT11 | UART1 RX | - |
| J5.124 | USB_HOST_DP | USB Data + | - |
| J5.126 | N.C. | - | - |
| J5.128 | SD4_DATA4 | UART2 RX | - |
| J5.130 | SD4_DATA6 | - | - |
| J5.132 | N.C. | - | - |
| J5.134 | USB_HOST_DN | USB Data - | - |
| J5.136 | N.C. | - | - |
| J5.138 | 3.3V_DACU | 3.3V DACU Power Supply | - |
| J5.140 | DGND | Ground | - |
Ethernet port ETH - J6[edit | edit source]
J6 is a RJ45 Gigabit Ethernet connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 11 | ETH0_TXRX0_P | - | - |
| 10 | ETH0_TXRX0_M | - | - |
| 4 | ETH0_TXRX1_P | - | - |
| 3 | ETH0_TXRX2_P | - | - |
| 2 | ETH0_TXRX2_M | - | - |
| 5 | ETH0_TXRX1_M | - | - |
| 8 | ETH0_TXRX3_P | - | - |
| 9 | ETH0_TXRX3_M | - | - |
| 15 | ETH0_LED1 | - | - |
| 13 | ETH0_LED2 | - | - |
| 17, 18 | ETH_SH | - | - |
Please refer to the carrier board schematics for details on center taps connection.
PCI Express - J7[edit | edit source]
J7 is PCI Express card edge connector V-type.
The following table reports the connector's pinout:
| Pin# | Pin Name | Function | Notes |
|---|---|---|---|
| 1.SIDE_A | PCIE_PRSNT1 | PRSNT1# | - |
| 1.SIDE_B | EXT_12V | +12 V | - |
| 2.SIDE_A | EXT_12V | +12 V | - |
| 2.SIDE_B | EXT_12V | +12 V | - |
| 3.SIDE_A | EXT_12V | +12 V | - |
| 3.SIDE_B | N.C. | - | - |
| 4.SIDE_A | DGND | Ground | - |
| 4.SIDE_B | DGND | Ground | - |
| 5.SIDE_A | - | - | Pulldown 10K Ohm |
| 5.SIDE_B | N.C. | - | - |
| 6.SIDE_A | - | - | Pullup 10K Ohm, 3.3V |
| 6.SIDE_B | N.C. | - | - |
| 7.SIDE_A | N.C. | - | - |
| 7.SIDE_B | DGND | Ground | - |
| 8.SIDE_A | - | - | Pullup 10K Ohm, 3.3V |
| 8.SIDE_B | PCI_3V3 | +3.3V | - |
| 9.SIDE_A | PCI_3V3 | +3.3V | - |
| 9.SIDE_B | - | - | Pulldown 10K Ohm |
| 10.SIDE_A | PCI_3V3 | +3.3V | - |
| 10.SIDE_B | N.C. | - | - |
| 11.SIDE_A | CPU_PORn | PERST# | - |
| 11.SIDE_B | N.C. | - | - |
| 12.SIDE_A | DGND | Ground | - |
| 12.SIDE_B | N.C. | - | - |
| 13.SIDE_A | PCI_REFCLKP | REFCLK+ | - |
| 13.SIDE_B | DGND | Ground | - |
| 14.SIDE_A | PCI_REFCLKP | REFCLK- | - |
| 14.SIDE_B | PCIE_TXP | HSOp(0) | - |
| 15.SIDE_A | DGND | Ground | - |
| 15.SIDE_B | PCIE_TXN | HSOn(0) | - |
| 16.SIDE_A | PCIE_RXP | HSIp(0) | - |
| 16.SIDE_B | DGND | Ground | - |
| 17.SIDE_A | PCIE_RXN | HSIn(0) | - |
| 17.SIDE_B | PCIE_PRSNT2 | PRSNT2# | - |
| 18.SIDE_A | DGND | Ground | - |
| 18.SIDE_B | DGND | Ground | - |
HDMI - J8[edit | edit source]
J8 is a HDMI type A 19-pin receptacle connector.
The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | HDMI_D2P | HDMI D2+ | - |
| 2, 5, 8, 11, 17 |
DGND | Ground | - |
| 3 | HDMI_D2N | HDMI D2- | - |
| 4 | HDMI_D1P | HDMI D1+ | - |
| 6 | HDMI_D1N | HDMI D1- | - |
| 7 | HDMI_D0P | HDMI D0+ | - |
| 9 | HDMI_D0N | HDMI D0- | - |
| 10 | HDMI_CLKP | HDMI Clock+ | - |
| 12 | HDMI_CLKN | HDMI Clock- | - |
| 13 | CE_REMOTE_OUT | - | - |
| 14 | N.C. | - | - |
| 15 | - | - | Pullup 1.8K Ohm, 5V |
| 16 | - | - | Pullup 1.8K Ohm, 5V |
| 18 | 5V_OUT_HDMI | +5V | - |
| 19 | HDMI_HP_OUT | HotPlug Detect | - |
| 20, 21, 22, 23 | SH_SDMI | Shield | - |
LVDS1 - J10[edit | edit source]
J10 is a 10x2-pin 1.25mm pitch connector. It is used for connecting a Display panel to the integrated LVDS1 video interface of the AXEL SOM.
The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1, 2 | 3.3V_LCD1 | +3.3V | - |
| 3, 4, 7, 10, 13, 16, 19 |
DGND | Ground | - |
| 5 | LVDS1_TX0_N | TX0- | - |
| 6 | LVDS1_TX0_P | TX0+ | - |
| 8 | LVDS1_TX1_N | TX1- | - |
| 9 | LVDS1_TX1_P | TX1+ | - |
| 11 | LVDS1_TX2_N | TX2- | - |
| 12 | LVDS1_TX2_P | TX2+ | - |
| 14 | LVDS1_CLK_N | Clock- | - |
| 15 | LVDS1_CLK_P | Clock+ | - |
| 17 | LVDS1_P17 | Backlight PWM | - |
| 18 | LVDS1_P18 | 5V Power Supply | - |
| 20 | LVDS1_P20 | Ground | - |
| 21 | LVDS_SHIELD | Shield | - |
| 22 | LVDS_SHIELD_1 | Shield | - |
Backlight LCD - J11[edit | edit source]
J11 is a 2-pin 3.5mm pitch connector.
The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | LED_K | Backlight PWM control signal | - |
| 2 | LED_A | 5V Power Supply | - |
J56[edit | edit source]
J56 is a 2x1-pn 2.54mm pitch connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | DGND | Ground | - |
| 2 | EXT_12V | 12V Power Supply | - |
CAM interface - J16[edit | edit source]
J16 is a 36-pin 0.50mm pitch vertical connector.
The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | SPI_MOSI_IPU2_CS1 [CSI_D15] |
CAM DATA[15] | - |
| 2 | CSI_D14 | CAM DATA[14] | - |
| 3 | SPI1_CS_IPU2_CSI1 | - | - |
| 4 | CMOS_RST#_IPU2_CSI1 | CMOS Reset | - |
| 5 | SPI1_CLK_IPU2_CS1 | - | - |
| 6 | SPI1_MISO_IPU2_CS1 | - | - |
| 7 | CMOS_I2C_SDA | I2C DATA | - |
| 8 | CMOS_I2C_SCL | I2C CLOCK | - |
| 9 | EIM_DA9 | CAM DATA[0] | - |
| 10 | EIM_DA8 | CAM DATA[1] | - |
| 11 | DGND | Ground | - |
| 12 | DGND | Ground | - |
| 13 | EIM_DA7 | CAM DATA[2] | - |
| 14 | EIM_DA6 | CAM DATA[3] | - |
| 15 | EIM_DA5 | CAM DATA[4] | - |
| 16 | EIM_DA4 | CAM DATA[5] | - |
| 17 | EIM_DA3 | CAM DATA[6] | - |
| 18 | EIM_DA2 | CAM DATA[7] | - |
| 19 | EIM_DA1 | CAM DATA[8] | - |
| 20 | EIM_DA0 | CAM DATA[9] | - |
| 21 | CSI1_D10 | CAM DATA[10] | - |
| 22 | CSI1_D11 | CAM DATA[11] | - |
| 23 | CSI1_D12 | CAM DATA[12] | - |
| 24 | CSI1_D13 | CAM DATA[13] | - |
| 25 | CSI1_CAM_HS | CAM Hsync | - |
| 26 | CSI1_CAM_VS | CAM Vsync | - |
| 27 | DGND | Ground | - |
| 28 | CSI1_CAM_PCLK | CAM Pixel Clock | - |
| 29 | DGND | Ground | - |
| 30 | R_CMOS_CLK_IPU2_CSI1 | CMOS Clock | - |
| 31 | DGND | Ground | - |
| 32 | N.C. | - | - |
| 33 | N.C. | - | - |
| 34 | CAM_VCC_IPU2_CSI1 | Power Supply | - |
| 35 | CAM_VCC_IPU2_CSI1 | Power Supply | - |
| 36 | CAM_VCC_IPU2_CSI1 | Power Supply | - |
| 37, 38, 39, 40 | SH_CAM | Shield to Ground | - |
MIPI camera connector - J53[edit | edit source]
J53 is a 33-pin 0.50mm pitch ZIF connector
The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | CSI_CLK0P | - | - |
| 2 | CSI_CLK0M | - | - |
| 4 | CSI_D0P | - | - |
| 5 | CSI_D0M | - | - |
| 7 | CSI_D1P | - | - |
| 8 | CSI_D1M | - | - |
| 10 | CSI_D2P | - | - |
| 11 | CSI_D2M | - | - |
| 13 | CSI_D3P | - | - |
| 14 | CSI_D3M | - | - |
| 16 | DSI_D1P | - | - |
| 17 | DSI_D1M | - | - |
| 19 | DSI_D0P | - | - |
| 20 | DSI_D0M | - | - |
| 22 | DSI_CLK0P | - | - |
| 23 | DSI_DCK0M | - | - |
| 3, 6, 9, 12 15, 18, 21, 24 |
DGND | - | - |
| 25 | KEY_COL3/I2C2_SCL | - | - |
| 26 | KEY_ROW3/I2C2_SDA | - | - |
| 27, 28 | 3.3V | - | - |
| 29 | GPIO_19 | - | - |
| 30 | GPIO_18 | - | - |
| 31 | GPIO_16 | - | - |
| 32, 33 | 5V | - | - |
USB OTG - J29[edit | edit source]
J29 is a standard USB Micro AB connector.
The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | DGND | Ground | - |
| 2 | OTG_ID | USB OTG ID | - |
| 3 | USB_OTG_DP | USB OTG Data+ | - |
| 4 | USB_OTG_DN | USB OTG Data- | - |
| 5 | USB_OTG_VBUS | Power Supply | - |
| 6, 7, 8, 9 | USB_OTG_SHIELD | Shield to Ground | - |
SOM Power Voltage Selector - J32[edit | edit source]
J32 is a 4x2-pin 2.54 pitch vertical header for SOM power voltage selection.
The available configurations are the following:
- all open: 2.8V
- 1-2 closed: 3.0V
- 3-4 closed: 3.3V
- 5-6 closed: 4.2V
- 7-8 closed: 4.5v
J33[edit | edit source]
J33 is a 2x1-pin 2.54 pitch vertical header. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | DGND | Ground | - |
| 2 | 5V | 5V Power Supply | - |
J34[edit | edit source]
J34 is a 2x1-pin 2.54 pitch vertical header. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | DGND | Ground | - |
| 2 | NVCC_AXEL_I/O_3.3V/1.8V | Power Supply | - |
J36[edit | edit source]
J36 is a 2x1-pin 2.54 pitch vertical header. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | PMIC_PWRON | - | - |
| 2 | 2V8-4V5_SOM_POWER_GOOD | - | - |
J40[edit | edit source]
J40 is a 4x1-pin 2.54 pitch vertical header. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1, 4 | DGND | Ground | - |
| 2 | CLK2_N | - | - |
| 3 | CLK2_P | - | - |
J42[edit | edit source]
J42 is a 2x1-pin 2.54 pitch vertical header. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | DGND | Ground | - |
| 2 | PMIC_5V | - | - |
IPU2_CSI1 (Generic Camera in) - J43[edit | edit source]
J43 is a 17x2-pin 1.27mm pitch receptacle connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | R_CMOS_CLK_IPU2_CSI1 | CMOS Clock | - |
| 2 | CSI1_D11 | CAM DATA[11] | - |
| 3 | DGND | Ground | - |
| 4 | CSI1_D10 | CAM DATA[10] | - |
| 5 | CMOS_I2C_SDA | I2C DATA | - |
| 6 | EIM_DA0 | CAM DATA[9] | - |
| 7 | CMOS_I2C_SCL | I2C CLOCK | - |
| 8 | EIM_DA1 | CAM DATA[8] | - |
| 9 | CMOS_RST#_IPU2_CSI1 | CMOS Reset | - |
| 10 | EIM_DA2 | CAM DATA[7] | - |
| 11 | CMOS_OE#_IPU2_CSI1 | CMOS OE# | - |
| 12 | EIM_DA3 | CAM DATA[6] | - |
| 13 | DGND | Ground | - |
| 14 | EIM_DA4 | CAM DATA[5] | - |
| 15 | CAM_VCC_2.8V_IPU2_CSI | 2.8V Power Supply | - |
| 16 | EIM_DA5 | CAM DATA[4] | - |
| 17 | CAM_VCC_2.8V_IPU2_CSI | 2.8V Power Supply | - |
| 18 | EIM_DA6 | CAM DATA[3] | - |
| 19 | DGND | Ground | - |
| 20 | EIM_DA7 | CAM DATA[2] | - |
| 21 | DGND | Ground | - |
| 22 | EIM_DA8 | CAM DATA[1] | - |
| 23 | CSI1_D13 | 3.3V Power Supply | - |
| 24 | EIM_DA9 | CAM DATA[0] | - |
| 25 | CAM_VCC_IPU2_CSI1 | 3.3V Power Supply | - |
| 26 | CAM_VCC_IPU2_CSI1 | 3.3V Power Supply | - |
| 27 | DGND | Ground | - |
| 28 | CSI1_CAM_PCLK | CAM Pixel Clock | - |
| 29 | CAM_VCC_1.8V_IPU2_CSI | 1.8V Power Supply | - |
| 30 | CSI1_CAM_HS | CAM Hsync | - |
| 31 | CAM_VCC_1.8V_IPU2_CSI | 1.8V Power Supply | - |
| 32 | CSI1_CAM_VS | CAM Vsync | - |
| 33 | CSI1_D13 | CAM DATA[13] | - |
| 34 | EIM_D28 | CAM DATA[12] | - |
EXPANSION CONNECTOR - J44[edit | edit source]
J44 is a 10x2-pin 2.54mm pitch vertical header. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | DGND | Ground | - |
| 2 | DGND | Ground | - |
| 3 | EIM_A25 | - | - |
| 4 | SD3_RST | - | - |
| 5 | EIM_BCLK | - | - |
| 6 | NVCC_SD3_EXT | - | - |
| 7 | NVCC_EIM_EXT | - | - |
| 8 | SD4_DATA2 | - | - |
| 9 | RGMII_MDC | - | - |
| 10 | SD4_DATA1 | - | - |
| 11 | RGMII_MDIO | - | - |
| 12 | DI0_PIN4 | - | - |
| 13 | VGEN4_1V8_I | - | - |
| 14 | NVCC_LCD_EXT | - | - |
| 15 | SD4_DATA0/NANDF_DQS | - | - |
| 16 | KEY_COL3/I2C2_SCL | - | - |
| 17 | NVCC_AXEL_I/O_3.3V/1.8V | - | - |
| 18 | KEY_ROW3/I2C2_SDA | - | - |
| 19 | DGND | Ground | - |
| 20 | DGND | Ground | - |
EXPANSION CONNECTOR - J46[edit | edit source]
J46 is a 10x2-pin 2.54mm pitch vertical header. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | DGND | Ground | - |
| 2 | DGND | Ground | - |
| 3 | RTC_VBAT | - | - |
| 4 | VDD_ARM23_CAP//VGEN4_1V8 | - | - |
| 5 | PMIC_LICELL | - | - |
| 6 | VDD_ARM01_CAP//VGEN5_2V8//VDD_VBUS_CAP | - | - |
| 7 | PMIC_VSNVS | - | - |
| 8 | VDD_SNVS_CAP//VGEN3_2V5//NVCC_PLL_OUT | - | - |
| 9 | VGEN1 | - | - |
| 10 | VGEN6 | - | - |
| 11 | VGEN2 | - | - |
| 12 | NVCC_AXEL_I/O_3.3V/1.8V | - | - |
| 13 | WDT_WDI//VDDPU | - | - |
| 14 | SW2_1.8V/3.3V | - | - |
| 15 | EIM_D16 | - | - |
| 16 | EIM_D23 | - | - |
| 17 | EIM_D18 | - | - |
| 18 | NOR_WP | - | - |
| 19 | DGND | Ground | - |
| 20 | DGND | Ground | - |
LVDS0 - J48[edit | edit source]
J48 is a 10x2-pin 2.54mm pitch vertical header. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1, 2 | 3.3V_LCD0 | +3.3V | - |
| 1, 2, 5, 8, 11, 14, 17, 19, 20 |
DGND | Ground | - |
| 3 | LVDS0_TX0_N | TX0- | - |
| 4 | LVDS0_TX0_P | TX0+ | - |
| 6 | LVDS0_TX1_P | TX1+ | - |
| 7 | LVDS0_TX1_N | TX1- | - |
| 9 | LVDS0_TX2_N | TX2- | - |
| 10 | LVDS0_TX2_P | TX2+ | - |
| 12 | LVDS0_CLK_N | Clock- | - |
| 13 | LVDS0_CLK_P | Clock+ | - |
| 15 | LVDS0_P17 | Backlight PWM | - |
| 16 | LVDS0_P18 | 5V Power Supply | - |
| 18 | LVDS0_P20 | Ground | - |
LVDS0 - J54[edit | edit source]
J54 is a 10x2 DF13A-20DP header. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1, 2 | 3.3V_LCD0 | +3.3V | - |
| 3, 4, 7, 10, 13, 16, 19, 21, 22 |
DGND | Ground | - |
| 5 | LVDS0_TX0_N | TX0- | - |
| 6 | LVDS0_TX0_P | TX0+ | - |
| 9 | LVDS0_TX1_P | TX1+ | - |
| 8 | LVDS0_TX1_N | TX1- | - |
| 11 | LVDS0_TX2_N | TX2- | - |
| 12 | LVDS0_TX2_P | TX2+ | - |
| 14 | LVDS0_CLK_N | Clock- | - |
| 15 | LVDS0_CLK_P | Clock+ | - |
| 17 | LVDS0_P17 | - | - |
| 18 | LVDS0_P18 | - | - |
| 20 | LVDS0_P20 | - | - |
IPU1_CSI0 - J19[edit | edit source]
J19 is a 25x2-pin 2.54mm pitch vertical header. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1, 2, 6, 15, 24 29, 40, 49,50 |
DGND | Ground | - |
| 3, 5, 7, 17, 19 31, 33, 35 |
N.C. | Not connected | - |
| 20, 22, 26, 28 30, 34 |
N.C. | Not connected | - |
| 4 | CSI0_PIXCLK | CMOS Clock | - |
| 9 | CSI0_DAT15 | CAM DATA[15] | - |
| 10 | CAM_VCC_IPU1_CSI0 | IPU1 CSI0 Power Supply | - |
| 11 | CSI0_DAT16 | CAM DATA[16] | - |
| 12 | CSI0_VSYNC | CSI0 Vertical Sync | - |
| 13 | CSI0_DAT17 | CAM DATA[17] | - |
| 14 | CSI0_MCLK | CSI0 MCLK | - |
| 16 | GPIO_19 | GPIO 19 | - |
| 18 | EIM_D26 | EIM D26 | - |
| 21 | CSI0_DAT9 | CAM DATA[9] | - |
| 23 | CSI0_DAT10 | CAM DATA[10] | - |
| 25 | CSI0_DAT11 | CAM DATA[11] | - |
| 27 | CSI0_DAT12 | CAM DATA[12] | - |
| 32 | CAM_VCC_IPU1_CSI0 | - | - |
| 36 | EIM_D27 | EIM D27 | - |
| 37 | CSI0_DAT4 | CAM DATA[4] | - |
| 38 | CSI0_DAT6 | CAM DATA[6] | - |
| 39 | CSI0_DAT5 | CAM DATA[5] | - |
| 41 | CSI0_DAT18 | CAM DATA[18] | - |
| 42 | CSI0_DAT7 | CAM DATA[6] | - |
| 43 | CSI0_DAT19 | CAM DATA[19] | - |
| 44 | CSI0_DAT8 | CAM DATA[8] | - |
| 45 | CSI0_DAT13 | CAM DATA[13] | - |
| 46 | KEY_ROW3/I2C2_SDA | - | - |
| 47 | CSI0_DAT14 | CAM DATA[14] | - |
| 48 | KEY_COL3/I2C2_SCL | - | - |
Boot MicroSD - J52[edit | edit source]
J52 is a microSD memory card connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | SD1_DAT2 | DATA[2] | - |
| 2 | SD1_DAT3 | Card Detect/DATA[3] | - |
| 3 | SD1_CMD | CMD line | - |
| 4 | 3.3V | Power Supply | - |
| 5 | SD1_CLK | Clock | - |
| 6, 9, 10, 11, 12 | DGND | - | - |
| 7 | SD1_DAT0 | DATA[0] | - |
| 8 | SD1_DAT1 | DATA[1] | - |
| 13 | 3.3V | - | - |
General purpose SD connector - J55[edit | edit source]
J52 is a microSD memory card connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | SD2_DAT3 | DATA[3] | - |
| 2 | SD2_CMD | CMD line | - |
| 3, 6 | DGND | Ground | - |
| 4 | 3.3V | Power Supply | - |
| 5 | SD2_CLK | Clock | - |
| 7 | SD2_DAT0 | DATA[0] | - |
| 8 | SD2_DAT1 | DATA[1] | - |
| 9 | SD2_DAT2 | DATA[2] | - |
SPI PMOD - JP17[edit | edit source]
JP17 is a 12-pin 6x2x2.54 pitch vertical header. The following table reports the pinout of the connector:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | SD2_DATA1 | - | - |
| 2 | GPIO_17 | - | - |
| 3 | SD2_CMD | - | - |
| 4, 6, 8 | N.C. | Not connected | - |
| 5 | SD2_DATA0 | - | |
| 7 | SD2_CLK | - | - |
| 9, 10 | DGND | Ground | - |
| 11, 12 | +3.3V | - | - |
Pin strip connectors[edit | edit source]
J-PROG-PMIC1[edit | edit source]
J-PROG-PMIC1 is a 4x2-pin, 2.54mm pitch header, pinstrip connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | PMIC_PROG_VPGM | - | - |
| 2 | 2V8-4V5 | - | - |
| 3 | DGND | Ground | - |
| 4 | PMIC_PROG_SCL | - | - |
| 5 | PMIC_PROG_SDA | - | - |
| 6 | PMIC_PWRON | - | - |
| 7 | MCU_GPIO1 | - | - |
| 8 | MCU_GPIO2 | - | - |
J-SEL-PROG1[edit | edit source]
J-SEL-PROG1 is a 3x1-pin, 2.54mm pitch header, pinstrip connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | 2V8-4V5 | - | - |
| 2 | PMIC_PROG_GATE_CTRl | - | - |
| 3 | DGND | Ground | - |
The available configurations are:
- jumper on 1-2, enable PMIC connection to programmer
- jumper on 2-3, disable PMIC connection to programmer
SATA - JP1[edit | edit source]
JP1 is a 7- pin header SATA connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1, 4, 7 | DGND | Ground | - |
| 2 | SATA_TXP | Sata TX+ | - |
| 3 | SATA_TXN | Sata TX- | - |
| 5 | SATA_RXN | Sata RX- | - |
| 6 | SATA_RXP | Sata RX+ | - |
| - | SH1 | Shield | - |
| - | SH2 | Shield | - |
SOM CONSUMPTION MONITOR - JP2[edit | edit source]
JP2 is a 5x1-pin, 2.54mm pitch header, pinstrip connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | DGND | Ground | - |
| 2 | 2V8-4V5_SOM | SOM Power Supply | - |
| 3 | KEY_ROW3/I2C2_SDA | I2C2 Data | - |
| 4 | KEY_COL3/I2C2_SCL | I2C2 Clock | - |
| 5 | VCC_PM | Power Monitor Voltage Supply | - |
NVCC_CSI selection - JP3[edit | edit source]
JP3 is a 8x2-pin 2.54mm pitch header pinstrip connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | - | - | Connected to pin 3 |
| 2 | DGND | Ground | - |
| 3 | - | - | Connected to pin 1 |
| 4, 6, 8, 10, 12, 14, 16 |
NVCC_CSI_EXT | - | - |
| 5 | 2V8-4V5_SOM | Power Supply | - |
| 7 | VGEN1 | Power Supply | - |
| 9 | VGEN2 | Power Supply | - |
| 11 | VGEN6 | Power Supply | - |
| 13 | VGEN4_1V8_I | Power Supply | - |
| 15 | NVCC_AXEL_I/O_3.3V/1.8V | Power Supply | - |
NVCC_EIM selection - JP4[edit | edit source]
JP4 is a 8x2-pin 2.54mm pitch header pinstrip connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | - | - | Connected to pin 3 |
| 2 | DGND | Ground | - |
| 3 | - | - | Connected to pin 1 |
| 4, 6, 8, 10, 12, 14, 16 |
NVCC_EIM_EXT | - | - |
| 5 | 2V8-4V5_SOM | Power Supply | - |
| 7 | VGEN1 | Power Supply | - |
| 9 | VGEN2 | Power Supply | - |
| 11 | VGEN6 | Power Supply | - |
| 13 | VGEN4_1V8_I | Power Supply | - |
| 15 | NVCC_AXEL_I/O_3.3V/1.8V | Power Supply | - |
NVCC_SD3 selection - JP5[edit | edit source]
JP5 is a 8x2-pin 2.54mm pitch header pinstrip connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | - | - | Connetted to pin 3 |
| 2 | DGND | Ground | - |
| 3 | - | - | Connetted to pin 1 |
| 4, 6, 8, 10, 12, 14, 16 |
NVCC_SD3_EXT | - | - |
| 5 | 2V8-4V5_SOM | Power Supply | - |
| 7 | VGEN1 | Power Supply | - |
| 9 | VGEN2 | Power Supply | - |
| 11 | VGEN6 | Power Supply | - |
| 13 | VGEN4_1V8_I | Power Supply | - |
| 15 | NVCC_AXEL_I/O_3.3V/1.8V | Power Supply | - |
NVCC_LCD selection - JP6[edit | edit source]
JP6 is a 8x2-pin 2.54mm pitch header pinstrip connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | - | - | Connetted to pin 3 |
| 2 | DGND | Ground | - |
| 3 | - | - | Connetted to pin 1 |
| 4, 6, 8, 10, 12, 14, 16 |
NVCC_LCD_EXT | - | - |
| 5 | 2V8-4V5_SOM | Power Supply | - |
| 7 | VGEN1 | Power Supply | - |
| 9 | VGEN2 | Power Supply | - |
| 11 | VGEN6 | Power Supply | - |
| 13 | VGEN4_1V8_I | Power Supply | - |
| 15 | NVCC_AXEL_I/O_3.3V/1.8V | Power Supply | - |
EXPANSION CONNECTOR - JP8[edit | edit source]
JP8 is a 8x2-pin 2.54mm pitch header pinstrip connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1, 2 | DGND | Ground | |
| 3 | CPU_RGMII_TXC_CONN | - | |
| 4 | CPU_RGMII_RXC_CONN | - | |
| 5 | CPU_RGMII_TX_CTL_CONN | - | |
| 6 | CPU_RGMII_RX_CTL_CONN | - | |
| 7 | CPU_RGMII_TD0_CONN | - | |
| 8 | CPU_RGMII_RD0_CONN | - | |
| 9 | CPU_RGMII_TD1_CONN | - | |
| 10 | CPU_RGMII_RD1_CONN | - | |
| 11 | CPU_RGMII_TD2_CONN | - | |
| 12 | CPU_RGMII_RD2_CONN | - | |
| 13 | CPU_RGMII_TD3_CONN | - | |
| 14 | CPU_RGMII_RD3_CONN | - | |
| 15, 16 | VGEN4_1V8_I | Voltage Power Supply |
EXPANSION CONNECTOR - JP9[edit | edit source]
JP9 is a 8x2-pin 2.54mm pitch header pinstrip connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1, 2, 5, 13 | DGND | Ground | |
| 3 | ETH0_CLK125_NDO | - | |
| 4 | NVCC_AXEL_I/O_3.3V/1.8V | - | |
| 6 | ENET_RXD0=//DDR_1V5 | - | |
| 7 | ENET_REF_CLK//VDDCORE | - | |
| 8 | ENET_RXD1 | - | |
| 9 | ENET_RX_ER//VDDSOC | - | |
| 10 | ENET_TXD0//BB_3.3V/2.5V | - | |
| 11 | ENET_TX_EN/GPIO1_IO28 | - | |
| 12 | ENET_TXD1//1V2_ETH | - | |
| 14,16 | VGEN4_1V8_I | - | |
| 15 | VGEN4_1V8_I | Voltage Power Supply |
JP10[edit | edit source]
JP10 is a 8x2-pin 2.54mm pitch header pinstrip connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1, 2, 10, 11, 14, 15, 16 |
DGND | Ground | |
| 3 | PMIC_SDWNB | - | |
| 4 | RTC_32kHz | - | |
| 5 | PMIC_INT_B | - | |
| 6 | RTC_RSTn | - | |
| 7 | CPU_PMIC_STBY_REQ | - | |
| 8 | RTC_INTn/SQW | - | |
| 9 | TEST_MODE | - | |
| 12 | TAMPER | - | |
| 13 | GPIO_18/PMIC_INT_B | - |
Boot configurations[edit | edit source]
The AxelEVB-Lite carrier board can host two different SoM's, Axel Ultra and Axel Lite.
The following sections detail boot configuration options, which differ depending on the SoM.
Axel Ultra[edit | edit source]
uSD card[edit | edit source]
Dip-switch configuration:
S5[1..8] : On Off On On On On Off Off S6[1..8] : Off Off On On Off On On On S7[1..8] : Off Off On On On On On On S8[1..8] : On Off On On Off On On On S9[1..2] : Off Off
SPI NOR flash[edit | edit source]
Dip-switch configuration:
S5[1..8] : On On Off Off On On Off Off S6[1..8] : Off Off On On Off On On On S7[1..8] : Off Off On Off Off Off On Off S8[1..8] : On Off On On Off On On On S9[1..2] : Off Off
Axel Lite[edit | edit source]
In this case, it is required to use the specific revision A adapter to plug the SoM. Regarding the boot options, please refer to this section.
Technical documents[edit | edit source]
Schematics[edit | edit source]
- ORCAD: http://mirror.dave.eu/axel/hw/AxelEVB/rev-A/axelevb-lite_S-EVBA1000C1R_1.0.8.dsn_.zip
- PDF: http://mirror.dave.eu/axel/hw/AxelEVB/rev-A/axelevb-lite_S-EVBA1000C1R_1.0.8.pdf
