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AxelEVB-Lite

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{{ImportantMessage|text=This page provides information for the AxelEVB-Lite carrier board model S-EVBA1000C1R (BOM 1.0.4), provided with XELK kits version 2.1.0 and above.
 
For AxelEVB-Lite manufactured before the release of XELK 2.1.0, please refer to [[AxelEVB-Lite_rev.0|this page]].
}}
 
 
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[[File:Axelevb-lite-01.png|500px|frameless|border]]==Introduction==
==Introduction==AxelEVB-Lite is a carrier board designed to host [[File:Axel Ultra SOM-evb-lite-revA 02.jpg|Axel Ultra]] and [[Axel Lite SOM500px|Axel Lite]] (through an adapter) SoMs. It exports some specific peripherals connectors and acts as an adaptation board used in combination with [[:Category:Dacuframeless|Dacuborder]] carrier board.
{{ImportantMessage|text=This page provides information for the AxelEVB-Lite is a carrier board model S-EVBA1000C1R designed to host [[:Category:AxelUltra|AXEL ULTRA]] and [[:Category:AxelLite|AXEL LITE]] (BOM 1.0.4through an adapter), provided with XELK kits version 2SoMs.1.0 It exports some specific peripherals connectors and above. If you have a acts as an adaptation board from a previous version of the XELK kit (older than 2.1.0), please contact used in combination with [[mailto:support-axel@dave.eu support-axel@dave.euCategory:Dacu|Dacu]]carrier board.}}
==Block Diagram==
The following picture shows Axel-EVB-Lite's block diagram:
[[File:Axelevb-lite-block diagram.png|700px|frameless|border|centre]]
== Features ==
* 1x USB OTG,1x USB HOST
* Serial port (RS232)
* JTAG
* HDMI connector
* SATA connector
=== MIPI camera connector - J53 ===
J16 J53 is a 33-pin 0.50mm pitch ZIF connector
The following table reports the connector's pinout:
|}
=== LVDS0 - J50 J54 ===
J50 J54 is a 10x2 DF13A-20DP header. The following table reports the connector's pinout:
{| class="wikitable"
=== Pin strip connectors ===
 
==== J-PROG-MICRO1 ====
 
J-PROG-MICRO1 is a 3x2-pin, 2.54mm pitch header, pinstrip connector. The following table reports the connector's pinout:
 
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 || BKGD_JM60|| - || -
|-
|2 || DGND|| Ground || -
|-
|3, 5 || N.C. || - || -
|-
|4 || RST_JM60|| - || -
|-
|6 || VIN_USB|| - || -
|-
|}
==== J-PROG-PMIC1 ====
!Notes
|-
|1 || - || - || Connetted Connected to pin 3
|-
|2 || DGND|| Ground|| -
|-
|3 || - || - || Connetted Connected to pin 1
|-
|4, 6, 8, 10,<br>12, 14, 16 || NVCC_CSI_EXT|| - || -
!Notes
|-
|1 || - || - || Connetted Connected to pin 3
|-
|2 || DGND|| Ground|| -
|-
|3 || - || - || Connetted Connected to pin 1
|-
|4, 6, 8, 10,<br>12, 14, 16 || NVCC_EIM_EXT|| - || -
|}
==== MIPI CSI - JP7 ====
 
JP7 is a 8x2-pin 2.54mm pitch header pinstrip connector. The following table reports the connector's pinout:
 
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 || CSI_D3P || Data3 + ||
|-
|2, 5, 8, 11,<br> 14, 16 || DGND|| Ground|| -
|-
|3 || CSI_D3N || Data3- ||
|-
|4 || CSI_D2P|| Data2+ || -
|-
|6 || CSI_D2M|| Data2-|| -
|-
|7 || CSI_D1P|| Data1+|| -
|-
|9 || CSI_D1M|| Data1- || -
|-
|13 || CSI_CLK0P|| Clock+ || -
|-
|15 || CSI_CLK0M|| Clock- || -
|-
|}
==== EXPANSION CONNECTOR - JP8 ====
|}
==Boot configurations == == MIPI DSI - JP11 =uSD === Dip-switch configuration:
JP11 is a 8x2-pin 2<pre>S5[1..8] : On Off On On On On Off OffS6[1..8] : Off Off On On Off On On OnS7[1..8] : Off Off On On On On On On S8[1..8] : On Off On On Off On On OnS9[1.54mm pitch header pinstrip connector. The following table reports the connector's pinout2] :Off Off</pre>
{| class="wikitable" == NOR SPI===|Dip-switch configuration:!Pin# !Pin name<pre>S5[1..8] : On On Off Off On On Off Off !FunctionS6[1..8] : Off Off On On Off On On On!NotesS7[1..8] : Off Off On Off Off Off On Off|-S8[1..8] : On Off On On Off On On On|S9[1, ..2, 7, 8,] : Off Off<br/pre> 12, 13, 15, 16 || DGND || Ground || | == XELK 2.0.0 == ===Schematics===* ORCAD: http://mirror.dave.eu/axel/AxelEVB/XELK-|3 || DSI_D1M || Data1 2.0.0/axelevb- || |lite-|0.9.4 || DSI_CLOCK0M || Clock - ||XELK-dsn.zip|* PDF: http://mirror.dave.eu/axel/AxelEVB/XELK-2.0.0/axelevb-lite-S.EVBA1000C0R.0.9.4.pdf|5 || DSI_D1P || Data1 + |||===BOM===* AxelEVB-|6 || DSI_CLOCK0P || Clock + |||Lite: http://mirror.dave.eu/axel/AxelEVB/XELK-2.0.0/axelevb-lite_BOM_S.EVBA1000C0R_0.9.4.CSV_.zip|9 || DSI_DOP|| Data0 + |||-===Layout===|10 || NVCC_AXEL_I* http:/O_3/mirror.dave.3Veu/axel/1AxelEVB/XELK-2.0.8|| 0/axelevb- ||lite_CS151613_assem_view.pdf|-|11 || DSI_D0M|| Data0 - ||===Mechanical===|-|14 || SW4_xV* DXF: http://1mirror.dave.8V || eu/axel/AxelEVB/XELK- |||2.0.0/axelevb-|}lite_3D_CS151613.zip
==SchematicsXELK 2.2.0 ==
===Schematics===* ORCAD: http://wwwmirror.dave.eu/systemaxel/filesAxelEVB/areaXELK-riservata2.2.0/axelevb-litelite_S-EVBA1000C1R_1.0.98.3-XELK-dsndsn_.zip* PDF: http://wwwmirror.dave.eu/systemaxel/filesAxelEVB/areaXELK-riservata2.2.0/axelevb-litelite_S-SEVBA1000C1R_1.EVBA1000C0R-0.9.38.pdf
===BOM===* AxelEVB-Lite: http://wwwmirror.dave.eu/systemaxel/filesAxelEVB/areaXELK-riservata2.2.0/axelevbAXELEVB-lite_BOM_SLITE_S.EVBA1000C0R_0EVBA1000C1R.91.30.CSV_8.zip
===Layout===* http://wwwmirror.dave.eu/systemaxel/filesAxelEVB/areaXELK-riservata2.2.0/axelevb-lite_CS151613_assem_viewlite_S-EVBA1000C1R_CS151613A_AssemView.pdf
===Mechanical===* DXF: http://wwwmirror.dave.eu/systemaxel/filesAxelEVB/areaXELK-riservata2.2.0/axelevb-lite_2D_CS151613lite-S-EVBA1000C1R_CS151613A-2D.dxf_.zip* IDF (3D): http://wwwmirror.dave.eu/systemaxel/filesAxelEVB/areaXELK-riservata2.2.0/axelevb-lite_3D_CS151613lite-S-EVBA1000C1R_CS151613A-3D.idf_.zip
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