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AxelEVB-Lite

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{{ImportantMessage|text=This page provides information for the AxelEVB-Lite carrier board model S-EVBA1000C1R (BOM 1.0.4), provided with XELK kits version 2.1.0 and above.
 
For AxelEVB-Lite manufactured before the release of XELK 2.1.0, please refer to [[AxelEVB-Lite_rev.0|this page]].
}}
 
 
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[[File:Axelevb-lite-01.png|500px|frameless|border]]==Introduction==
==Introduction==AxelEVB-Lite is a carrier board designed to host [[File:Axel Ultra SOM-evb-lite-revA 02.jpg|Axel Ultra]] and [[Axel Lite SOM500px|Axel Lite]] (through an adapter) SoMs. It exports some specific peripherals connectors and acts as an adaptation board used in combination with [[:Category:Dacuframeless|Dacuborder]] carrier board.
{{ImportantMessage|text=This page provides information for the AxelEVB-Lite is a carrier board model S-EVBA1000C1R designed to host [[:Category:AxelUltra|AXEL ULTRA]] and [[:Category:AxelLite|AXEL LITE]] (BOM 1.0.4through an adapter), provided with XELK kits version 2SoMs.1.0 It exports some specific peripherals connectors and above. If you have a acts as an adaptation board from a previous version of the XELK kit (older than 2.1.0), please contact used in combination with [[mailto:support-axel@dave.eu support-axel@dave.euCategory:Dacu|Dacu]]carrier board.}}
==Block Diagram==
The following picture shows Axel-EVB-Lite's block diagram:
[[File:Axelevb-lite-block diagram.png|700px|frameless|border|centre]]
== Features ==
* 1x USB OTG,1x USB HOST
* Serial port (RS232)
* JTAG
* HDMI connector
* SATA connector
|-
|37, 38, 39, 40 || SH_CAM || Shield to Ground || -
|-
|}
 
=== MIPI camera connector - J53 ===
 
J53 is a 33-pin 0.50mm pitch ZIF connector
 
The following table reports the connector's pinout:
 
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 || CSI_CLK0P || - || -
|-
|2 || CSI_CLK0M || - || -
|-
|4 || CSI_D0P || - || -
|-
|5 || CSI_D0M || - || -
|-
|7 || CSI_D1P || - || -
|-
|8 || CSI_D1M || - || -
|-
|10 || CSI_D2P || - || -
|-
|11 || CSI_D2M || - || -
|-
|13 || CSI_D3P || - || -
|-
|14 || CSI_D3M || - || -
|-
|16 || DSI_D1P || - || -
|-
|17 || DSI_D1M || - || -
|-
|19 || DSI_D0P || - || -
|-
|20 || DSI_D0M || - || -
|-
|22 || DSI_CLK0P || - || -
|-
|23 || DSI_DCK0M || - || -
|-
|3, 6, 9, 12<br>15, 18, 21, 24 || DGND || - || -
|-
|25 || KEY_COL3/I2C2_SCL || - || -
|-
|26 || KEY_ROW3/I2C2_SDA || - || -
|-
|27, 28 || 3.3V || - || -
|-
|29 || GPIO_19 || - || -
|-
|30 || GPIO_18 || - || -
|-
|31 || GPIO_16 || - || -
|-
|32, 33 || 5V || - || -
|-
|}
|7 || NVCC_EIM_EXT || - || -
|-
|8 || SD3_DATA6 SD4_DATA2 || - || -
|-
|9 || RGMII_MDC || - || -
|-
|10 || SD3_DATA7 SD4_DATA1 || - || -
|-
|11 || RGMII_MDIO || - || -
|14 || NVCC_LCD_EXT || - || -
|-
|15 || DATA0SD4_DATA0/NANDF_DQS || - || -
|-
|16 || KEY_COL3/I2C2_SCL || - || -
|13 || WDT_WDI//VDDPU || - || -
|-
|14 || DGND SW2_1.8V/3.3V || Ground - || -
|-
|15 || EIM_D16 || - || -
|17 || EIM_D18 || - || -
|-
|18 || DGND NOR_WP || Ground - || -
|-
|19 || DGND || Ground || -
!Function
!Notes
|-
|1, 2 ||3.3V_LCD0 || +3.3V || -
|-
|1, 2, 5, 8,<br>11, 14, 17, 19,<br>20 ||DGND || Ground || -
|}
=== IPU1_CSI0 (1/2) LVDS0 - J50 J54 ===
J50 J54 is a 10x2DF13A-pin 2.54mm pitch vertical 20DP header. The following table reports the connector's pinout:
{| class="wikitable"
!Notes
|-
|1 , 2 || CSI0_DAT11 3.3V_LCD0 || CAM DATA[11] +3.3V || -
|-
|2 3, 4, 7, 10,<br>13, 16, 19, 21, 22 || R_CMOS_CLK_IPU1_CSI0 DGND || CMOS Clock Ground || -
|-
|3 5 || CSI0_DAT10 LVDS0_TX0_N || CAM DATA[10] TX0- || -
|-
|4 6 || DGND LVDS0_TX0_P || Ground TX0+ || -
|-
|5 9 || CSI0_DAT9 LVDS0_TX1_P || CAM DATA[9] TX1+ || -
|-
|6 8 || CMOS_I2C_SDALVDS0_TX1_N || I2C DATATX1- || -
|-
|7 11 || CSI0_DAT8 LVDS0_TX2_N|| CAM DATA[8] TX2- || -
|-
|8 12|| CMOS_I2C_SCLLVDS0_TX2_P|| I2C CLOCK TX2+ || -
|-
|9 14 || CSI0_DAT7 LVDS0_CLK_N || CAM DATA[7] Clock- || -
|-
|10 15 || CMOS_RST#_IPU1_CSI0 LVDS0_CLK_P || CMOS_RST#Clock+ || -
|-
|11 17 || CSI0_DAT6 LVDS0_P17 || CAM DATA[6] - || -
|-
|12 18 || CMOS_OE#_IPU1_CSI0 LVDS0_P18 || CMOS_OE# - || -
|-
|13 20 || CSI0_DAT5 LVDS0_P20 || CAM DATA[5] - || -
|-
|14 || DGND || Ground || -|-|15 || CSI0_DAT4 || CAM DATA[4] || -|-|16 || CAM_VCC_2.8V_IPU1_CSI0 || 2.8V Power Supply || -|-|17 || EIM_D30 || CAM DATA[3] || -|-|18 || CAM_VCC_2.8V_IPU1_CSI0 || 2.8V Power Supply || -|-|19 || EIM_D31 || CAM DATA[2] || -|-|20 || DGND || Ground || -|-|}
=== IPU1_CSI0 (2/2) - J51 J19 ===
J51 J19 is a 10x225x2-pin 2.54mm pitch vertical header. The following table reports the connector's pinout:
{| class="wikitable"
!Notes
|-
|1 , 2, 6, 15, 24<br>29, 40, 49,50 || EIM_D26 DGND || CAM DATA[1] Ground || -|-|3, 5, 7, 17, 19<br>31, 33, 35 || N.C. || Not connected || -|-|20, 22, 26, 28<br>30, 34 || N.C. || Not connected || -
|-
|2 4 || DGND CSI0_PIXCLK || Ground CMOS Clock || -|-|9 || CSI0_DAT15 || CAM DATA[15] || -|-|10 || CAM_VCC_IPU1_CSI0 || IPU1 CSI0 Power Supply || -|-|11 || CSI0_DAT16 || CAM DATA[16] || -|-|12 || CSI0_VSYNC || CSI0 Vertical Sync || -|-|13 || CSI0_DAT17 || CAM DATA[17] || -|-|14 || CSI0_MCLK || CSI0 MCLK || -|-|16 || GPIO_19 || GPIO 19 || -|-|18 || EIM_D26 || EIM D26 || -|-|21 || CSI0_DAT9 || CAM DATA[9] || -
|-
|3 23 || EIM_D27CSI0_DAT10 || CAM DATA[010] || -
|-
|4, 5, 6 25 || CAM_VCC_IPU1_CSI0CSI0_DAT11 || 3.3V Power Supply CAM DATA[11] || -
|-
|7 27 || CSI0_PIXCLKCSI0_DAT12 || CAM Pixel Clock DATA[12] || -
|-
|8 32 || DGND CAM_VCC_IPU1_CSI0 || Ground - || -
|-
|9 36 || CSI0_MCLKEIM_D27 || CAM Hsync EIM D27 || -
|-
|10 37 || CAM_VCC_1.8V_IPU1_CSI0CSI0_DAT4 || 1.8V Power Supply CAM DATA[4] || -
|-
|11 38 || CSI0_VSYNCCSI0_DAT6 || CAM Vsync DATA[6] || -
|-
|12 39 || CAM_VCC_1.8V_IPU1_CSI0CSI0_DAT5 || 1.8V Power Supply CAM DATA[5] || -
|-
|13 41 || CSI0_DAT12CSI0_DAT18 || CAM DATA[1218] || -
|-
|14 42 || CSI0_DAT13CSI0_DAT7 || CAM DATA[136] || -
|-
|15 43 || CSI0_DAT16CSI0_DAT19 || CAM DATA[1619] || -
|-
|16 44 || CSI0_DAT19CSI0_DAT8 || CAM DATA[198]|| -
|-
|17 45 || CSI0_DAT17CSI0_DAT13 || CAM DATA[1713]|| -
|-
|18 46 || CSI0_DATA_ENKEY_ROW3/I2C2_SDA || CAM DATA Enable - || -
|-
|19 47 || CSI0_DAT18CSI0_DAT14 || CAM DATA[1814] || -
|-
|20 48 || NVCC_EIM_EXTKEY_COL3/I2C2_SCL || CSI1_VEXT - || -
|-
|}
=== Boot MicroSD - J52 ===
J52 is a microSD memory card connector. The following table reports the connector's pinout:
!Notes
|-
|1 ||SD2_DAT2SD1_DAT2||| DATA[2] || -
|-
|2 ||SD2_DAT3SD1_DAT3||| Card Detect/DATA[3] || -
|-
|3 ||SD2_CMDSD1_CMD||| CMD line || -
|-
|4 ||NVCC_AXEL_I/O_33.3V/1.8V||| Power Supply || -
|-
|5 ||SD2_CLKSD1_CLK||| Clock || -
|-
|6, 9, 10, 11, 12 ||DGND||| - || -
|-
|7 ||SD2_DAT0SD1_DAT0||| DATA[0] || -
|-
|8 ||SD2_DAT1SD1_DAT1||| DATA[1] || -
|-
|13 ||GPIO_03.3V|| - ||Pull up to 3.3V with 10K Ohm -
|-
|}
=== Pin strip connectors General purpose SD connector - J55 ===
==== J-PROG-MICRO1 ==== J-PROG-MICRO1 J52 is a 3x2-pin, 2.54mm pitch header, pinstrip microSD memory card connector. The following table reports the connector's pinout:
{| class="wikitable"
!Notes
|-
|1 || BKGD_JM60SD2_DAT3||| DATA[3] || - |-|2 ||SD2_CMD||| CMD line || -|-|3, 6 ||DGND||| Ground || -|-|4 ||3.3V||| Power Supply || -
|-
|2 5 || DGNDSD2_CLK|| Ground | Clock || -
|-
|3, 5 7 || N.C. SD2_DAT0|| - | DATA[0] || -
|-
|4 8 || RST_JM60SD2_DAT1|| - | DATA[1] || -
|-
|6 9 || VIN_USBSD2_DAT2|| - | DATA[2] || -
|-
|}
==== JSPI PMOD -PROG-PMIC1 =JP17 ===
J-PROG-PMIC1 JP17 is a 4x212-pin, 26x2x2.54mm 54 pitch vertical header, pinstrip connector. The following table reports the pinout of the connector's pinout:
{| class="wikitable"
!Notes
|-
|1 || PMIC_PROG_VPGMSD2_DATA1||| - || -
|-
|2 || 2V8-4V5GPIO_17 ||| - || -
|-
|3 || DGNDSD2_CMD || Ground | - || -
|-
|4 , 6, 8 || PMIC_PROG_SCLN.C.|| - | Not connected || -
|-
|5 || PMIC_PROG_SDASD2_DATA0 ||| - || -
|-
|6 7 || PMIC_PWRON SD2_CLK ||| - || -
|-
|7 9, 10 || MCU_GPIO1DGND || - | Ground || -
|-
|8 11, 12 || MCU_GPIO2+3.3V ||| - || -
|-
|}
==== J-SEL-PROG1 =Pin strip connectors ===
==== J-PROG-PMIC1 ==== J-PROG-PMIC1 is a 4x2-pin, 2.54mm pitch header, pinstrip connector. The following table reports the connector's pinout: {| class="wikitable" |-!Pin# !Pin name!Function!Notes|-|1 || PMIC_PROG_VPGM|| - || -|-|2 || 2V8-4V5|| - || -|-|3 || DGND|| Ground || -|-|4 || PMIC_PROG_SCL|| - || -|-|5 || PMIC_PROG_SDA|| - || -|-|6 || PMIC_PWRON || - || -|-|7 || MCU_GPIO1|| - || -|-|8 || MCU_GPIO2|| - || -|-|} ==== J-SEL-PROG1 ==== J-SEL-PROG1 is a 3x1-pin, 2.54mm pitch header, pinstrip connector. The following table reports the connector's pinout:
{| class="wikitable"
|1 || 2V8-4V5|| - || -
|-
|2 || MIC_PROG_GATE_CTRlPMIC_PROG_GATE_CTRl|| - || -
|-
|3 || DGND|| Ground || -
!Notes
|-
|1 || - || - || Connetted Connected to pin 3
|-
|2 || DGND|| Ground|| -
|-
|3 || - || - || Connetted Connected to pin 1
|-
|4, 6, 8, 10,<br>12, 14, 16 || NVCC_CSI_EXT|| - || -
!Notes
|-
|1 || - || - || Connetted Connected to pin 3
|-
|2 || DGND|| Ground|| -
|-
|3 || - || - || Connetted Connected to pin 1
|-
|4, 6, 8, 10,<br>12, 14, 16 || NVCC_EIM_EXT|| - || -
|}
==== MIPI CSI - JP7 ====
 
JP7 is a 8x2-pin 2.54mm pitch header pinstrip connector. The following table reports the connector's pinout:
 
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 || CSI_D3P || Data3 + ||
|-
|2, 5, 8, 11,<br> 14, 16 || DGND|| Ground|| -
|-
|3 || CSI_D3N || Data3- ||
|-
|4 || CSI_D2P|| Data2+ || -
|-
|6 || CSI_D2M|| Data2-|| -
|-
|7 || CSI_D1P|| Data1+|| -
|-
|9 || CSI_D1M|| Data1- || -
|-
|13 || CSI_CLK0P|| Clock+ || -
|-
|15 || CSI_CLK0M|| Clock- || -
|-
|}
==== EXPANSION CONNECTOR - JP8 ====
|}
==Boot configurations == MIPI DSI  === uSD === Dip-switch configuration: <pre>S5[1..8] : On Off On On On On Off OffS6[1..8] : Off Off On On Off On On OnS7[1..8] : Off Off On On On On On On S8[1..8] : On Off On On Off On On OnS9[1..2] : Off Off</pre> === NOR SPI=== Dip- JP11 switch configuration: <pre>S5[1..8] : On On Off Off On On Off Off S6[1..8] : Off Off On On Off On On OnS7[1..8] : Off Off On Off Off Off On OffS8[1..8] : On Off On On Off On On OnS9[1..2] : Off Off</pre>  ==XELK 2.0.0 ==
JP11 is a 8x2===Schematics===* ORCAD: http://mirror.dave.eu/axel/AxelEVB/XELK-pin 2.54mm pitch header pinstrip connector0. The following table reports the connector's pinout0/axelevb-lite-0.9.4-XELK-dsn.zip* PDF:http://mirror.dave.eu/axel/AxelEVB/XELK-2.0.0/axelevb-lite-S.EVBA1000C0R.0.9.4.pdf
{| class="wikitable" ==BOM===|* AxelEVB-!Pin# !Pin name!Function!Notes|Lite: http://mirror.dave.eu/axel/AxelEVB/XELK-|1, 2, 7, 8,<br> 12, 13, 15, 16 || DGND || Ground || |.0.0/axelevb-|3 || DSI_D1M || Data1 - || |-|lite_BOM_S.EVBA1000C0R_0.9.4 || DSI_CLOCK0M || Clock - ||.CSV_.zip|-|5 || DSI_D1P || Data1 + ||===Layout===|-|6 || DSI_CLOCK0P || Clock + |||-|9 || DSI_DOP|| Data0 + |||-|10 || NVCC_AXEL_I* http://O_3mirror.dave.3Veu/1axel/AxelEVB/XELK-2.0.8|| 0/axelevb- ||lite_CS151613_assem_view.pdf|-|11 || DSI_D0M|| Data0 - ||===Mechanical===|-|14 || SW4_xV* DXF: http://1mirror.dave.8V || eu/axel/AxelEVB/XELK- |||2.0.0/axelevb-|}lite_3D_CS151613.zip
==SchematicsXELK 2.2.0 ==
===Schematics===* ORCAD: http://wwwmirror.dave.eu/systemaxel/filesAxelEVB/areaXELK-riservata2.2.0/axelevb-litelite_S-EVBA1000C1R_1.0.98.3-XELK-dsndsn_.zip* PDF: http://wwwmirror.dave.eu/systemaxel/filesAxelEVB/areaXELK-riservata2.2.0/axelevb-litelite_S-SEVBA1000C1R_1.EVBA1000C0R-0.9.38.pdf
===BOM===* AxelEVB-Lite: http://wwwmirror.dave.eu/systemaxel/filesAxelEVB/areaXELK-riservata2.2.0/axelevbAXELEVB-lite_BOM_SLITE_S.EVBA1000C0R_0EVBA1000C1R.91.30.CSV_8.zip
===Layout===* http://wwwmirror.dave.eu/systemaxel/filesAxelEVB/areaXELK-riservata2.2.0/axelevb-lite_CS151613_assem_viewlite_S-EVBA1000C1R_CS151613A_AssemView.pdf
===Mechanical===* DXF: http://wwwmirror.dave.eu/systemaxel/filesAxelEVB/areaXELK-riservata2.2.0/axelevb-lite_2D_CS151613lite-S-EVBA1000C1R_CS151613A-2D.dxf_.zip* IDF (3D): http://wwwmirror.dave.eu/systemaxel/filesAxelEVB/areaXELK-riservata2.2.0/axelevb-lite_3D_CS151613lite-S-EVBA1000C1R_CS151613A-3D.idf_.zip
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