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J50 J19 is a 10x225x2-pin 2.54mm pitch vertical header. The following table reports the connector's pinout:
→IPU1_CSI0 (1/2) - J50
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=== IPU1_CSI0 (1/2) - J50 J19 ===
{| class="wikitable"
!Notes
|-
|1 , 2, 6, 15, 24<br>29, 40, 49,50 || CSI0_DAT11 DGND || CAM DATA[11] Ground || -
|-
|2 3, 5, 7, 17, 19<br>31, 33, 35 || R_CMOS_CLK_IPU1_CSI0 N.C. || CMOS Clock Not connected || -
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|3 20, 22, 26, 28<br>30, 34 || CSI0_DAT10 N.C. || CAM DATA[10] Not connected || -
|-
|4 || DGND CSI0_PIXCLK || Ground CMOS Clock || -
|-
|5 9 || CSI0_DAT9 CSI0_DAT15 || CAM DATA[915] || -
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|6 10 || CMOS_I2C_SDACAM_VCC_IPU1_CSI0 || I2C DATAIPU1 CSI0 Power Supply || -
|-
|7 11 || CSI0_DAT8 CSI0_DAT16 || CAM DATA[816] || -
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|8 12 || CMOS_I2C_SCLCSI0_VSYNC || I2C CLOCK CSI0 Vertical Sync || -
|-
|9 13 || CSI0_DAT7 CSI0_DAT17 || CAM DATA[717] || -
|-
|10 14 || CMOS_RST#_IPU1_CSI0 CSI0_MCLK || CMOS_RST#CSI0 MCLK || -
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|11 16 || CSI0_DAT6 GPIO_19 || CAM DATA[6] GPIO 19 || -
|-
|12 18 || CMOS_OE#_IPU1_CSI0 EIM_D26 || CMOS_OE# EIM D26 || -
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|13 21 || CSI0_DAT5 CSI0_DAT9 || CAM DATA[59] || -
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|14 23 || DGND CSI0_DAT10 || Ground CAM DATA[10] || -
|-
|15 25 || CSI0_DAT4 CSI0_DAT11 || CAM DATA[411] || -
|-
|16 27 || CAM_VCC_2.8V_IPU1_CSI0 CSI0_DAT12 || 2.8V Power Supply CAM DATA[12] || -
|-
|17 32 || EIM_D30 CAM_VCC_IPU1_CSI0 || CAM DATA[3] - || -
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|18 36 || CAM_VCC_2.8V_IPU1_CSI0 EIM_D27 || 2.8V Power Supply EIM D27 || -
|-
|19 37 || EIM_D31 CSI0_DAT4 || CAM DATA[24] || -
|-
|20 38 || DGND CSI0_DAT6 || Ground CAM DATA[6] || -|-|39 || CSI0_DAT5 || CAM DATA[5] || -|-|41 || CSI0_DAT18 || CAM DATA[18] || -|-|42 || CSI0_DAT7 || CAM DATA[6] || -|-|43 || CSI0_DAT19 || CAM DATA[19] || -|-|44 || CSI0_DAT8 || CAM DATA[8] || -|-|45 || CSI0_DAT13 || CAM DATA[13] || -|-|46 || KEY_ROW3/I2C2_SDA || - || -|-|47 || CSI0_DAT14 || CAM DATA[14] || -|-|48 || KEY_COL3/I2C2_SCL || - || -
|-
|}
