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==Introduction==
AXELULite AXEL ULite system-on-module (SOM for short) is powered by carrier board via <code>VIN_SOM</code> rail.
About voltage range, three supported configurations are available. These configurations are indicated by the value of the '''f''' field of the ordering code. The generic ordering code is in the form:
*3: power supply voltage range is 3.25 - 3.465V (that us 3.3 +5%/-1.5%).
Voltage references for single-ended I/O signals the same for all configurations. They are detailed in the following table.  {|class="wikitable" style="text-align: center;"|-!Signal groups!Voltage reference!SODIMM pin number!Nominal voltage|-| UART1-UART5 <br> CSI <br> LCD <br> NAND<br>SD1<br>JTAG <br> GPIO1 <br> ENET1-ENET2 ||3V3_IO||155||3.3|-| SNVS_TAMPER[9:0]||VDD_SNVS_IN||143||3.0|}  '''What is interfaced to 3.3V signals at carrier board level may be referenced to a different voltage than 3.3V_IO. However, the difference between this voltage and 3.3V_IO must not exceed 300mV.'''This constraint is automatically satisfied if*one of the following ordering codes is used: <code>DA p l r n c '''0''' t s</code>, <code>DA p l r n c '''1''' t s</code> or <code>DA p l r n c '''3''' t s</code>*the same voltage rail is used to power AXEULite SOM and 3.3V carrier board circuitry. Since powering is strictly related to reset signals, reading of [[Reset_scheme_Reset scheme (AXELULiteAXEL ULite)|this page]] is highly recommended. Fot information about power consumption, please refer to [[Power consumption (AXEL ULite)|this article]]. {{ImportantMessage|text=For more information about this options, please contact DAVE's sales team at [mailto:sales@dave.eu sales@dave.eu]}}
== Power Supply Unit (PSU) and recommended power-up sequence ==
Implementing correct power-up sequence for i.MX6UL processors is not a trivial task because several power rails are involved. AXELULite AXEL ULite SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry:
The typical power-up sequence is the following:
# (optional) PMIC_LICELL is powered by a Lithium coin cell battery
#*iMX6UL SNVS domain is powered ([[Pinout_(AXEL_ULite)#VDD_SNVS_IN|VDD_SNVS_IN]])
# VIN_SOM main power supply rail is powered
#*iMX6UL SNVS domain is powered ([[Pinout_(AXEL_ULite)#VDD_SNVS_IN|VDD_SNVS_IN]])
# CPU_PORn (active-low) is driven low
# PMIC_PWRON signal is pulled-up (unless carrier board circuitry keeps this signal low for any reason)
# CPU_PORn is released.
For further details, please refer to <ref name="PF3000">Freescale Semiconductor, ''PF3000 Advance Information - Power Management Integrated Circuit (PMIC) for i.MX 7 & i.MX 6SL/SX/UL''</ref>, <ref name="IMX6ULIEC">''Freescale Semiconductor, Data Sheet: Technical Data - i.MX 6UltraLite Applications Processors for Industrial Products''</ref>.
==References==
{{reflist}}
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