Changes

NXP iMX6UL processor implements a very flexible boot process. This versatility comes at the price of a non trivial bootstrap configuration scheme. Typical system-on-module (SOM for short) adopter does not want/need to deal with such a complexity. In other words , he/she expects to manage few boot configuration issues because it is assumed that most of them are handled by "hidden" within the SOM itself. Nevertheless, there are specific applications where the system integrator needs full control of all the bootstrap configuration options, even if the design is built upon a SOM.

These two needs - ease of use and configurability - clearly push in opposite directions. During the conception inception of the AXEL ULite product AXELULite, specific attention has been addressed to find a viable trade off to satisfy such requirements. This effort has led to the options that are detailed in the section [[#Options for AXELULite AXEL ULite users|Options for AXELULite AXEL ULite users]]. Before skipping Reader can skip directly to itthis paragraph, it however he/she is recommended encouraged to read [[#Overview of NXP iMX6UL bootstrap process|this section]] that depicts as well, in order to get an overview of the processor's boot process.

An It is worth remembering that an exhaustive discussion of this issue is beyond the scope of this article. For more details, please refer to <ref name="IMX6ULRM">NXP, IMX6ULRM, ''i.MX 6UltraLite Applications Processor Reference Manual''</ref>.

| UART1_TX_DATA||TBDK14||uart1.TX_DATA||Alt 0

| UART1_RX_DATA||TBDK16||uart1.RX_DATA||Alt 0

| UART2_TX_DATA||TBDJ17||uart2.TX_DATA||Alt 0

| UART2_RX_DATA||TBDJ16||uart2.RX_DATA||Alt 0

==Options for AXELULite AXEL ULite users==From the point of view of boot configuration programming, AXELULite AXEL ULite portfolio consists of two basic categories of ordering codes:#part numbers in the form TBD DLTx0xx'''0'''0x2R have eFUSEs not programmed#* the other ordering codes have eFUSE programmed as detailed in the [[#P-eFUSE ordering codes|following section]].For convenience, the products belonging to the first category will be denoted as ''NP-eFUSE''. The others will be referred as ''P-eFUSE''. ===P-eFUSE ordering codes===P-EFUSE codes address users who that don't need to have the full control of boot configuration and can use one of the preconfigured options. These configurations are intended to satisfy most commonly used boot process should choose one schemes. Nevertheless, '''users are strongly recommended to understand the limitations of these part numbers; such configurations in order to verify they meet system requirements'''. Generally speaking, AXEL ULite supports two kind of memories as internal boot devices: NOR flash (connected to ESCPI1 interface) and NAND flash.  These devices can #be combined differently. However, no matter how NAND and NOR flash are combined, all of P-eFUSE ordering codes have:*<code>SDMMC_MFG_DISABLE</code> set to 0: ''manufacture mode'' is '''enabled'''*program <code>BT_FUSE_SEL</code> is set to 1, meaning that that eFUSEs by themselveshave been programmed#*<code>FORCE_INTERNAL_BOOT</code> is set to 0, in order to let <code>BOOT_MODE</code> pins to select main boot mode*implement circuitry at carrier board level <code>SEC_CONFIG[1:0]</code> are set to 01 to exploit allow any program image, even if authentication fails (''GPIO override'this option is intended for non-secure products' mode properly'')#**decide <code>eFuse 0x470[4]</code> is set to 1, to disable UART serial download.This leads to three different boot flows and that are shown in the following pictures. ====NAND-NOR option==== This configuration makes use of NAND flash as primary internal boot device. NOR flash is used as secondary boot device where, for example, a so-called ''GPIO overridegolden image'' approach even for mass productionof the bootlader can be stored.#The other [[File:AXELULite-boot-NAND-NOR.png|thumb|center|750px|Boot flow for ordering codes have eFUSE programmed code in the form DLTxxxx'''2'''0x2R]]  ====NAND-only option==== This configuration makes use of NAND flash as detailed primary - and only - internal boot device. [[File:AXELULite-boot-NAND.png|thumb|center|750px|Boot flow for ordering code in the following tableform DLTx0xx'''2'''0x2R]]  ====NOR-NAND option==== This configuration makes use of NOR flash as primary internal boot device. Nevertheless, NAND flash is available for generic storage. NAND flash can not be used as booting device.[[File:AXELULite-boot-NOR-NAND. These codes address users that donpng|thumb|center|750px|Boot flow for ordering code in the form DLTxxxx'''1'''t need full control 0x2R]] *NOR option: From the point of view of boot process, this configuration and can use one is identical to the NOR-NAND option. This is clearly cheaper because NAND flash is not populated.   The following table details eFUSE programming of the preconfigured optionsavailable P-eFUSE ordering codes.{| style="color:#000000; border:solid 2px #73B2C7; background-color:#ededed;font-size:95%; vertical-align:middle;"| [[File:TBD.png|30px]]| '''Section not completed yet'''|}

 P-eFUSE products yet provides a moderated freedom in terms of configurability and openness. Generally speaking, this may affect system security. '''Hence it is strongly recommended that system integrator does a detailed assessment in case he/she is considering the use of P-eFUSE SOMs, especially if security concerns are relevant'''. ===NP-eFUSE ordering codes=AXELULite ==Users who need to have the '''full control''' of the boot process should choose one of the NP-eFUSE part numbers. This allows them to be able to*program eFUSEs by themselves*implement circuitry at carrier board level to exploit ''GPIO override''*decide to use ''GPIO override'' approach even for mass production. ====AXEL ULite adapter====To ease the development effort of the customers working with nonNP-preprogrammed uFUSEseFUSE SOMs, DAVE Embedded Systems has made available a specific adapter board. For more information please see [[AXELULite AXEL ULite adapter|this page]].