AXEL Lite SOM/AXEL Lite Hardware/Power and Reset/Power Supply Unit (PSU) and recommended power-up sequence

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Version Issue Date Notes
1.0.0 Sep 2020 New documentation layout


Power Supply Unit (PSU) and recommended power-up sequence[edit | edit source]

Implementing correct power-up sequence for TBD: SOC ' processors is not a trivial task because several power rails are involved.

AXEL Lite SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry:

AXEL Lite-power-sequence.png

The PSU is composed of two main blocks:

  • power management integrated circuit
  • additional generic power management circuitry that completes PMIC functionalities

The PSU:

  • generates the proper power-up sequence required by the SOC processor and surrounding memories and peripherals
  • synchronizes the powering up of carrier board in order to prevent back power
  • provides some spare regulated voltages that can be used to power carrier board devices

Power-up sequence[edit | edit source]

TBD: descrizione dei segnali che intervengono nella PS

Note on BOARD_PGOOD usage[edit | edit source]

TBD: verificare le note sul BOARD_PGOOD

BOARD_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals.

Depending on the kind of such loads, BOARD_PGOOD might not be able to drive them properly. In these cases a simple 2-input AND port can be used to address this issue. The following picture depicts a principle schematic showing this solution.

VDD_SOM denotes the power rail used to power AXEL Lite SoM.

AXEL Lite-power-good.png