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Created page with "<section begin=History/> {| style="border-collapse:collapse; " ! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History |- ! style="borde..."
<section begin=History/>
{| style="border-collapse:collapse; "
! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
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! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Version
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |Oct 2020
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |New documentation layout
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<section begin=Body/>
==Peripheral Watchdog ==
The Watchdog Timer (WDOG) protects against system failures by providing a method by which to escape from unexpected events or programming errors.
=== Description ===
'''By default, the Watchdog Timer of iMX6 SOC is internally used on AXEL Lite for the CPU-initiated software reset function.'''
For more details see the [[AXEL_Lite_SOM/AXEL_Lite_Hardware/Power_and_Reset/Reset_scheme_and_control_signals#Handling_CPU-initiated_software_reset|reset scheme and control signals]] section.
The Watchdog timer supports the following features:
* Configurable timeout counter with timeout periods from 0.5 to 128 seconds which, after timeout expiration, result in the assertion of WDOG_RESET_B_DEB reset signal
* Time resolution of 0.5 seconds
* Power down counter with fixed timeout period of 16 seconds, which if not disabled after reset will assert WDOG_B signal low
===Pin mapping===
The Pin mapping is described in the [[AXEL Lite SOM/AXEL Lite Hardware/Pinout_Table | Pinout table section]]
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[[Category:AXEL Lite]]
{| style="border-collapse:collapse; "
! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
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! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Version
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |1.0.0
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |Oct 2020
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |New documentation layout
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<section end=History/>
<section begin=Body/>
==Peripheral Watchdog ==
The Watchdog Timer (WDOG) protects against system failures by providing a method by which to escape from unexpected events or programming errors.
=== Description ===
'''By default, the Watchdog Timer of iMX6 SOC is internally used on AXEL Lite for the CPU-initiated software reset function.'''
For more details see the [[AXEL_Lite_SOM/AXEL_Lite_Hardware/Power_and_Reset/Reset_scheme_and_control_signals#Handling_CPU-initiated_software_reset|reset scheme and control signals]] section.
The Watchdog timer supports the following features:
* Configurable timeout counter with timeout periods from 0.5 to 128 seconds which, after timeout expiration, result in the assertion of WDOG_RESET_B_DEB reset signal
* Time resolution of 0.5 seconds
* Power down counter with fixed timeout period of 16 seconds, which if not disabled after reset will assert WDOG_B signal low
===Pin mapping===
The Pin mapping is described in the [[AXEL Lite SOM/AXEL Lite Hardware/Pinout_Table | Pinout table section]]
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[[Category:AXEL Lite]]