Bureaucrats, dave_user, Administrators
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Created page with "<section begin=History/> {| style="border-collapse:collapse; " !colspan="4" style="width:100%; text-align:left"; border-bottom:solid 2px #ededed"|History |- !style="border-le..."
<section begin=History/>
{| style="border-collapse:collapse; "
!colspan="4" style="width:100%; text-align:left"; border-bottom:solid 2px #ededed"|History
|-
!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Version
!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Issue Date
!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Notes
|-
|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|1.0.0
|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|Oct 2020
|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|First DESK release
|}
<section end=History/>
<section begin=Body/>
==LVDS ==
=== Description ===
SBCX provides two LVDS interfaces, LVDS0 and LVDS1.
* J8 is a Hirose (cod. DF13A-20DP-1.25V) double row 1.25mm pitch miniature crimping connector
* J9 is a Hirose (cod. DF13A-20DP-1.25V) double row 1.25mm pitch miniature crimping connector
===Signals ===
The following tables describes the interface signals
==== LVDS0 ====
{| class="wikitable"
! latexfontsize="scriptsize"| Pin#
! latexfontsize="scriptsize"| SOM Pin#
! latexfontsize="scriptsize"| Pin name
! latexfontsize="scriptsize"| Pin function
! latexfontsize="scriptsize"| Pin Notes
|-
| 1, 2 || - || 3.3V_LCD0 || 3.3 V||
|-
| 3, 4, 7, 10,
13, 16, 19
| - || DGND || Ground||
|-
| 5 || J10.137 || LVDS0_TX0_N || LVDS Data 0 -||
|-
| 6 || J10.139 || LVDS0_TX0_P || LVDS Data 0 +||
|-
| 8 || J10.141 || LVDS0_TX1_N || LVDS Data 1 -||
|-
| 9 || J10.143 || LVDS0_TX1_P || LVDS Data 1 +||
|-
| 11 || J10.145 || LVDS0_TX2_N || LVDS Data 2 -||
|-
| 12 || J10.147 || LVDS0_TX2_P || LVDS Data 2 +||
|-
| 14 || J10.133 || LVDS0_CLK_N || LVDS Clock -||
|-
| 15 || J10.135 || LVDS0_CLK_P || LVDS Clock +||
|-
| 17 || J10.149 || LVDS0_P17 || Mount options|| LVDS0_TX3_N option
|-
| 18 || J10.151 || LVDS0_P18 || Mount options|| LVDS0_TX3_P option
|-
| 20 || J10.46 || LVDS0_P20 || Mount options|| GND or PWM (J10.46) option
|}
==== LVDS1 ====
{| class="wikitable"
! latexfontsize="scriptsize"| Pin#
! latexfontsize="scriptsize"| SOM Pin#
! latexfontsize="scriptsize"| Pin name
! latexfontsize="scriptsize"| RS-232
! latexfontsize="scriptsize"| RS-422
! latexfontsize="scriptsize"| RS-485
|-
|}
=== Device mapping ===
* LVDS0 is mapped to <code>/dev/fb0</code> device in Linux
* LVDS1 is mapped to the corresponding device driver in Linux, depending on the <code>ldb</code> peripheral configuration in the device tree. The default value is ''disabled'' but can be mapped to <code>/dev/fb2</code> (second and independent LCD panel) or can be the second LVDs channel for a dual-channel LCD panel configuration (like a 1920x1080 DUAL LVDS channel LCD panel)
=== Device usage ===
The associated framebuffer device is accessed in Linux through the standard graphic access.
----
[[Category:AXEL Lite]]
{| style="border-collapse:collapse; "
!colspan="4" style="width:100%; text-align:left"; border-bottom:solid 2px #ededed"|History
|-
!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Version
!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Issue Date
!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Notes
|-
|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|1.0.0
|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|Oct 2020
|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|First DESK release
|}
<section end=History/>
<section begin=Body/>
==LVDS ==
=== Description ===
SBCX provides two LVDS interfaces, LVDS0 and LVDS1.
* J8 is a Hirose (cod. DF13A-20DP-1.25V) double row 1.25mm pitch miniature crimping connector
* J9 is a Hirose (cod. DF13A-20DP-1.25V) double row 1.25mm pitch miniature crimping connector
===Signals ===
The following tables describes the interface signals
==== LVDS0 ====
{| class="wikitable"
! latexfontsize="scriptsize"| Pin#
! latexfontsize="scriptsize"| SOM Pin#
! latexfontsize="scriptsize"| Pin name
! latexfontsize="scriptsize"| Pin function
! latexfontsize="scriptsize"| Pin Notes
|-
| 1, 2 || - || 3.3V_LCD0 || 3.3 V||
|-
| 3, 4, 7, 10,
13, 16, 19
| - || DGND || Ground||
|-
| 5 || J10.137 || LVDS0_TX0_N || LVDS Data 0 -||
|-
| 6 || J10.139 || LVDS0_TX0_P || LVDS Data 0 +||
|-
| 8 || J10.141 || LVDS0_TX1_N || LVDS Data 1 -||
|-
| 9 || J10.143 || LVDS0_TX1_P || LVDS Data 1 +||
|-
| 11 || J10.145 || LVDS0_TX2_N || LVDS Data 2 -||
|-
| 12 || J10.147 || LVDS0_TX2_P || LVDS Data 2 +||
|-
| 14 || J10.133 || LVDS0_CLK_N || LVDS Clock -||
|-
| 15 || J10.135 || LVDS0_CLK_P || LVDS Clock +||
|-
| 17 || J10.149 || LVDS0_P17 || Mount options|| LVDS0_TX3_N option
|-
| 18 || J10.151 || LVDS0_P18 || Mount options|| LVDS0_TX3_P option
|-
| 20 || J10.46 || LVDS0_P20 || Mount options|| GND or PWM (J10.46) option
|}
==== LVDS1 ====
{| class="wikitable"
! latexfontsize="scriptsize"| Pin#
! latexfontsize="scriptsize"| SOM Pin#
! latexfontsize="scriptsize"| Pin name
! latexfontsize="scriptsize"| RS-232
! latexfontsize="scriptsize"| RS-422
! latexfontsize="scriptsize"| RS-485
|-
|}
=== Device mapping ===
* LVDS0 is mapped to <code>/dev/fb0</code> device in Linux
* LVDS1 is mapped to the corresponding device driver in Linux, depending on the <code>ldb</code> peripheral configuration in the device tree. The default value is ''disabled'' but can be mapped to <code>/dev/fb2</code> (second and independent LCD panel) or can be the second LVDs channel for a dual-channel LCD panel configuration (like a 1920x1080 DUAL LVDS channel LCD panel)
=== Device usage ===
The associated framebuffer device is accessed in Linux through the standard graphic access.
----
[[Category:AXEL Lite]]