Difference between revisions of "AXEL Lite SOM/AXEL Lite Evaluation Kit/Interfaces and Connectors/JTAG"
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| − | ! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History | + | !colspan="4" style="width:100%; text-align:left"; border-bottom:solid 2px #ededed"|History |
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| − | ! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" | | + | !style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|ID# |
| − | ! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date | + | !style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Issue Date |
| − | ! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes | + | !style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Notes |
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| − | | style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | | + | |style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|{{oldid|11422|11422}} |
| − | | style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | | + | |style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|07/11/2020 |
| − | | style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |Add JTAG EVB connector | + | |style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|New layout documentation |
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| + | ! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" |{{oldid|17016|17016}} | ||
| + | ! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" |22/09/2021 | ||
| + | ! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" |Add JTAG EVB connector | ||
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Revision as of 10:42, 5 September 2022
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| History | |||
|---|---|---|---|
| ID# | Issue Date | Notes | |
| 07/11/2020 | New layout documentation | ||
| 22/09/2021 | Add JTAG EVB connector | ||
On board JTAG connector[edit | edit source]
JTAG signals are routed to a dedicated connector on the AXEL Lite PCB.
The connector is placed on the top side of the PCB, at the upper-right corner (please see the picture below).
J7 - SOM Connector's pinout[edit | edit source]
J7 footprint mates with Samtec FSI-110-03-G-S connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | ARM-20 JTAG | Notes |
|---|---|---|---|---|
| 1 | DGND | - | 4,6,8,10,12,14,16,18,20 | For example documented on Lauterbach specification |
| 2 | JTAG_TCK | - | 9 | - |
| 3 | JTAG_TMS | - | 7 | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
| 4 | JTAG_TDO | - | 13 | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
| 5 | JTAG_TDI | - | 5 | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
| 6 | JTAG_nTRST | - | 3 (*) | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
| 7 | CPU_PORn | - | 15 (*) | - |
| 8 | N.C. | - | - | |
| 9 | N.C. | - | - | |
| 10 | JTAG_VREF | - | 1 | 3V3 (BOARD_PGOOD driven signal) |
(*) keep the possibility to be unconnected
JD1 - EVB Connector's pinout[edit | edit source]
JD1 is a 10x1x2.54mm pinhole header. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | DGND | - | |
| 2 | JTAG_TCK | - | - |
| 3 | JTAG_TMS | - | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
| 4 | JTAG_TDO | - | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
| 5 | JTAG_TDI | - | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
| 6 | JTAG_nTRST | - | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
| 7 | JTAG_nRST | - | - |
| 8 | N.C. | - | - |
| 9 | N.C. | - | - |
| 10 | JTAG_VREF | - |
