Difference between revisions of "AXEL Lite SOM/AXEL Lite Evaluation Kit/Interfaces and Connectors/DWS"
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Revision as of 10:10, 7 September 2022
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DWS[edit | edit source]
Description[edit | edit source]
J24 is a 30-pins 0.50mm Pitch SlimStack™ Receptacle. This connector is dedicated to the optional DWS add-on module.
The module is built around a Telit WE866C6-P Dual Band (2.4GHz and 5GHz) 802.11 ac WiFi and Bluetooth 5 module. The module implements the necessary PHY/MAC layers to support WLAN applications in conjunction with a host processor over a SDIO interface. The module also provides a Bluetooth platform through the HCI transport layer. Both WLAN and Bluetooth share the same antenna port.
Signals[edit | edit source]
The following table describes the interface signals:
| Pin# | SOM Pin# | Pin name | Pin function | Pin Notes |
|---|---|---|---|---|
| 1, 2 | - | 5V | ||
| 3, 4 | - | 3.3V | ||
| 5, 6, 9, 10, 19 | - | DGND | Ground | |
| 7 | J10.69 | TIWI_MMC2_CMD | ||
| 8 | J10.71 | TIWI_MMC2_CLK | ||
| 11 | J10.61 | TIWI_MMC2_DAT0 | ||
| 13 | J10.63 | TIWI_MMC2_DAT1 | ||
| 15 | J10.65 | TIWI_MMC2_DAT2 | ||
| 17 | J10.67 | TIWI_MMC2_DAT3 | ||
| 21 | J10.47 | UART2_RX | Used only for BT peripheral | |
| 23 | J10.55 | UART2_CTS | Used only for BT peripheral | |
| 24 | J10.39 | TIWI_BT_F5 | ||
| 25 | J10.49 | UART2_TX | Used only for BT peripheral | |
| 26 | J10.41 | TIWI_BT_F2 | ||
| 27 | J10.59 | UART2_RTS | Used only for BT peripheral | |
| 28 | J10.43 | TIWI_IRQ | ||
| 29 | J10.99 | TIWI_BT_EN | ||
| 30 | J10.45 | TIWI_EN | ||
| 12, 14, 16, 18, 20, 22 | - | N.C. | Not connected |
Device mapping[edit | edit source]
The WiFi peripheral is mapped to the corresponding wlan<X> device in Linux. The network peripheral is visible under the ifconfig network configuration utility.
Device usage[edit | edit source]
The peripheral is used the standard kernel interface and network protocol stack.
