Bureaucrats, dave_user, Administrators
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→Pinout table naming conventions
* PMIC.<x> : pin connected to the Power Manager IC (NXP PCA9451A)
* LAN.<x> : pin connected to the LAN PHY (Microchip LAN8830T-V)
|-
|'''Ball/pin #'''
|NVCC_3V3
|I
|mounting option
|
|
|-
| rowspan="8" |J1.43
|
|-
| rowspan="76" |J1.53| rowspan="76" |SAI1_TXFS| rowspan="76" |CPU.SAI1_TXFS//BOOT2| rowspan="76" |G21| rowspan="76" |NVCC_AON| rowspan="76" |IO| rowspan="76" |
|Pin ALT-0
|SAI1.TX_SYNC
|-
|Pin ALT-5
|GPIO1_IO11|-|Pin ALT-6|//BOOT_MODE[2]
|-
| rowspan="8" |J1.55
| rowspan="4" |NVCC_GPIO
| rowspan="4" |IO
| rowspan="4" |Optionally connected to internal Flex SPI (NOR or NAND option)
|Pin ALT-0
|USDHC3.DATA0
|-
|Pin ALT-1
|FLE_SPIFLEX_SPI.A_DATA[0]
|-
|Pin ALT-4
| rowspan="4" |NVCC_GPIO
| rowspan="4" |IO
| rowspan="4" |Optionally connected to internal Flex SPI (NOR or NAND option)
|Pin ALT-0
|USDHC3.DATA1
|-
|Pin ALT-1
|FLE_SPIFLEX_SPI.A_DATA[1]
|-
|Pin ALT-4
| rowspan="4" |NVCC_GPIO
| rowspan="4" |IO
| rowspan="4" |Optionally connected to internal Flex SPI (NOR or NAND option)
|Pin ALT-0
|USDHC3.DATA2
|-
|Pin ALT-1
|FLE_SPIFLEX_SPI.A_DATA[2]
|-
|Pin ALT-4
| rowspan="4" |NVCC_GPIO
| rowspan="4" |IO
| rowspan="4" |Optionally connected to internal Flex SPI (NOR or NAND option)
|Pin ALT-0
|USDHC3.DATA3
|-
|Pin ALT-1
|FLE_SPIFLEX_SPI.A_DATA[3]
|-
|Pin ALT-4
| rowspan="4" |NVCC_GPIO
| rowspan="4" |IO
| rowspan="4" |Optionally connected to internal Flex SPI (NOR or NAND option)
|Pin ALT-0
|USDHC3.CMD
|-
|Pin ALT-1
|FLE_SPIFLEX_SPI.A_SS0_B
|-
|Pin ALT-4
| rowspan="4" |NVCC_GPIO
| rowspan="4" |IO
| rowspan="4" |Optionally connected to internal Flex SPI (NOR or NAND option)
|Pin ALT-0
|USDHC3.CLK
|-
|Pin ALT-1
|FLE_SPIFLEX_SPI.A_SCLK
|-
|Pin ALT-4
| rowspan="5" |NVCC_GPIO
| rowspan="5" |IO
| rowspan="5" |Used as default console for Cortex-M33
|Pin ALT-0
|UART2_TX
| rowspan="6" |NVCC_GPIO
| rowspan="6" |IO
| rowspan="6" |Used as default console for Cortex-M33
|Pin ALT-0
|UART2_RX
| rowspan="5" |J1.187
| rowspan="5" |UART1_TXD
| rowspan="5" |CPU.UART1_TXD//BOOT_MODE0BOOT0
| rowspan="5" |E21
| rowspan="5" |NVCC_GPIO
| rowspan="5" |IO
| rowspan="5" |Used as default Linux console (Cortex-A55)
|Pin ALT-0
|UART1_TX
|-
|Pin ALT-5
|GPIO1_IO05//BOOT_MODE[0]
|-
| rowspan="5" |J1.189
| rowspan="5" |NVCC_GPIO
| rowspan="5" |IO
| rowspan="5" |Used as default Linux console (Cortex-A55)
|Pin ALT-0
|UART1_RX