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AURA SOM/AURA Hardware/Pinout Table

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<section begin="History" />
{| style="border-collapse:collapse; "
!colspan="4" style="width:100%; text-align:left"; border-bottom:solid 2px #ededed"|History
|-
!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|ID#!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Issue Date!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Notes
|-
|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|{{oldid|1789118728|178912023/05/15}}|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|15Preliminary version|-| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|18879|2023/0510/23}}| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |Final SOM release|-| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|18983|2023/12/01}}|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|Preliminary versionPinmux label fix|-! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" |2023/12/20! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" |Pin labels renaming<br>Add pinmux spreadsheet download
|-
|}
<section end="History" /><section begin="Body" />
==Connectors and Pinout Table==
The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to AURA pinout specifications. See the images below for reference:
[[File:AURA-topSOM_top-pin1-203.png|500px|thumb|AURA TOP view|none]][[File:AURA-bottomSOM_bottom-pin2-204.png|500px|thumb|AURA BOTTOM view|none]]
===Pinout table naming conventions ===
Each row in the pinout tables contains the following information:
{|class="wikitable" style="width:50%;"
|-
|'''Pin'''
* PMIC.<x> : pin connected to the Power Manager IC (NXP PCA9451A)
* LAN.<x> : pin connected to the LAN PHY (Microchip LAN8830T-V)
* NOR.<x>: pin connected to the flash NOR
* SV.<x>: pin connected to voltage supervisor
* MTR: pin connected to voltage monitors
|-
|'''Ball/pin #'''
|3.3VIN
|3.3
|See [[AURA_SOM/AXEL_Lite_HardwareAURA_Hardware/Electrical_Thermal_and_Mechanical_Features/Operational_characteristics#Recommended_ratings|Operational_characteristics]] of the SoM wiki page
|-
|NVCC_3V3
|3.3
|Voltage generated by the internal PSU. See [[AURA_SOM/AXEL_Lite_HardwareAURA_Hardware/Power_and_Reset/Power_Supply_Unit_(PSU)_and_recommended_power-up_sequence | Power Supply Unit (PSU)]] wiki page
|-
|NVCC_GPIOVDD_ANA_1V8|31.38|Voltage generated by the internal PSU. See [[AURA_SOM/AXEL_Lite_Hardware/Power_and_Reset/Power_Supply_Unit_(PSU)_and_recommended_power-up_sequence | Power Supply Unit (PSU)]] wiki page
|-
|}
 
===Pinout table XLS file ===
For your convenience, please find a spreadsheet with the AURA/MIMX935x pinout and pinmux table [https://www.dave.eu/links/p/hdTvHz4xQ811bdtb here].
==Pinout Table ODD pins declaration ==
! latexfontsize="scriptsize" | Type
! latexfontsize="scriptsize" | Notes
! colspan="2" latexfontsize="scriptsize"| Alternative Functions
|-
|J1.1
|J1.13
|ETH1_LED1
|LAN.LED1/PME_N1GPIO0
|18
|NVCC_3V3
|J1.15
|ETH1_LED2
|LAN.LED2/GPIO1
|16
|NVCC_3V3
|NVCC_3V3
|I
|mounting option
|
|
|(mounting option)
|-
| rowspan="8" |J1.43
| rowspan="8" |CPU.GPIO_IO06
| rowspan="8" |L20
| rowspan="8" |NVCC_GPIONVCC_3V3
| rowspan="8" |IO
| rowspan="8" |
|-
|Pin ALT-1
|TMP5_CH0TPM5_CH0|-|Pin ALT-2|PDM_BIT_STREAM01|-|Pin ALT-3|DISP_DATA02|-|Pin ALT-4|SPI7_SOUT|-|Pin ALT-5|UART6_CTS_B|-|Pin ALT-6|I2C7_SDA|-|Pin ALT-7|FLEXIO1_FLEXIO06|-| rowspan="8" |J1.45| rowspan="8" |GPIO_IO18| rowspan="8" |CPU.GPIO_IO18| rowspan="8" |R18| rowspan="8" |NVCC_3V3| rowspan="8" |IO| rowspan="8" ||Pin ALT-0|GPIO2_IO18|-|Pin ALT-1|SAI3_RX_BCLK|-|Pin ALT-2|CAM_DATA09|-|Pin ALT-3|DISP_DATA14|-|Pin ALT-4|SPI5_PCS0|-|Pin ALT-5|SPI4_PCS0|-|Pin ALT-6|TPM5_CH2|-|Pin ALT-7|FLEXIO1_FLEXIO18|-| rowspan="8" |J1.47| rowspan="8" |GPIO_IO09| rowspan="8" |CPU.GPIO_IO09| rowspan="8" |M21| rowspan="8" |NVCC_3V3| rowspan="8" |IO| rowspan="8" ||Pin ALT-0|GPIO2_IO09|-|Pin ALT-1|SPI3_SIN|-|Pin ALT-2|CAM_DATA03|-|Pin ALT-3|DISP_DATA05|-|Pin ALT-4|TPM3_EXTCLK|-|Pin ALT-5|UART7_RX|-|Pin ALT-6|I2C7_SCL|-|Pin ALT-7|FLEXIO1_FLEXIO09|-| rowspan="8" |J1.49| rowspan="8" |GPIO_IO08| rowspan="8" |CPU.GPIO_IO08| rowspan="8" |M20| rowspan="8" |NVCC_3V3| rowspan="8" |IO| rowspan="8" ||Pin ALT-0|GPIO2_IO08|-|Pin ALT-1|SPI3_SPCS0|-|Pin ALT-2|CAM_DATA02|-|Pin ALT-3|DISP_DATA04|-|Pin ALT-4|TPM6_CH0|-|Pin ALT-5|UART7_TX|-|Pin ALT-6|I2C7_SDA|-|Pin ALT-7|FLEXIO1_FLEXIO08|-|J1.51|||||||||-| rowspan="6" |J1.53| rowspan="6" |SAI1_TXFS| rowspan="6" |CPU.SAI1_TXFS//BOOT2| rowspan="6" |G21| rowspan="6" |NVCC_AON| rowspan="6" |IO| rowspan="6" ||Pin ALT-0|SAI1_TX_SYNC|-|Pin ALT-1|SAI1_TX_DATA01|-|Pin ALT-2|SPI1_PCS0|-|Pin ALT-3|UART2_DTR_B|-|Pin ALT-4|MQS1_LEFT|-|Pin ALT-5|GPIO1_IO11//BOOT_MODE[2]|-| rowspan="8" |J1.55| rowspan="8" |GPIO_IO10| rowspan="8" |CPU.GPIO_IO10| rowspan="8" |N17| rowspan="8" |NVCC_3V3| rowspan="8" |IO| rowspan="8" ||Pin ALT-0|GPIO2_IO10|-|Pin ALT-1|SPI3_SOUT|-|Pin ALT-2|CAM_DATA04|-|Pin ALT-3|DISP_DATA06|-|Pin ALT-4|TPM4_EXTCLK|-|Pin ALT-5|UART7_CTS_B|-|Pin ALT-6|I2C8_SDA|-|Pin ALT-7|FLEXIO1_FLEXIO10|-|J1.57|DGND|DGND| -| -|G||||-| rowspan="8" |J1.59| rowspan="8" |GPIO_IO11| rowspan="8" |CPU.GPIO_IO11| rowspan="8" |N18| rowspan="8" |NVCC_3V3| rowspan="8" |IO| rowspan="8" ||Pin ALT-0|GPIO2_IO11|-|Pin ALT-1|SPI3_SCLK|-|Pin ALT-2|CAM_DATA05|-|Pin ALT-3|DISP_DATA07|-|Pin ALT-4|TPM5_EXTCLK|-|Pin ALT-5|UART7_RTS_B|-|Pin ALT-6|I2C8_SCL|-|Pin ALT-7|FLEXIO1_FLEXIO11|-| rowspan="4" |J1.61| rowspan="4" |SD3_DATA0| rowspan="4" |CPU.GPIO_IO11| rowspan="4" |T16| rowspan="4" |NVCC_3V3| rowspan="4" |IO| rowspan="4" |Optionally connected to internal Flex SPI (NOR or NAND option)|Pin ALT-0|USDHC3_DATA0|-|Pin ALT-1|FLEXSPI1_A_DATA00|-|Pin ALT-4|FLEXIO1_FLEXIO22|-|Pin ALT-5|GPIO3_IO22|-| rowspan="4" |J1.63| rowspan="4" |SD3_DATA1| rowspan="4" |CPU.GPIO_IO11| rowspan="4" |V14| rowspan="4" |NVCC_3V3| rowspan="4" |IO| rowspan="4" |Optionally connected to internal Flex SPI (NOR or NAND option)|Pin ALT-0|USDHC3_DATA1|-|Pin ALT-1|FLEXSPI1_A_DATA01|-|Pin ALT-4|FLEXIO1_FLEXIO23|-|Pin ALT-5|GPIO3_IO23|-| rowspan="4" |J1.65| rowspan="4" |SD3_DATA2| rowspan="4" |CPU.GPIO_IO12| rowspan="4" |U14| rowspan="4" |NVCC_3V3| rowspan="4" |IO| rowspan="4" |Optionally connected to internal Flex SPI (NOR or NAND option)|Pin ALT-0|USDHC3_DATA2|-|Pin ALT-1|FLEXSPI1_A_DATA02|-|Pin ALT-4|FLEXIO1_FLEXIO24|-|Pin ALT-5|GPIO3_IO24|-| rowspan="4" |J1.67| rowspan="4" |SD3_DATA3| rowspan="4" |CPU.GPIO_IO13| rowspan="4" |T14| rowspan="4" |NVCC_3V3| rowspan="4" |IO| rowspan="4" |Optionally connected to internal Flex SPI (NOR or NAND option)|Pin ALT-0|USDHC3_DATA3|-|Pin ALT-1|FLEXSPI1_A_DATA03|-|Pin ALT-4|FLEXIO1_FLEXIO25|-|Pin ALT-5|GPIO3_IO25|-| rowspan="4" |J1.69| rowspan="4" |SD3_CMD| rowspan="4" |CPU.GPIO_IO21| rowspan="4" |U16| rowspan="4" |NVCC_3V3| rowspan="4" |IO| rowspan="4" |Optionally connected to internal Flex SPI (NOR or NAND option)|Pin ALT-0|USDHC3_CMD|-|Pin ALT-1|FLEXSPI1_A_SS0_B|-|Pin ALT-4|FLEXIO1_FLEXIO21|-|Pin ALT-5|GPIO3_IO21|-| rowspan="4" |J1.71| rowspan="4" |SD3_CLK| rowspan="4" |CPU.GPIO_IO20| rowspan="4" |V16| rowspan="4" |NVCC_3V3| rowspan="4" |IO| rowspan="4" |Optionally connected to internal Flex SPI (NOR or NAND option)|Pin ALT-0|USDHC3_CLK|-|Pin ALT-1|FLEXSPI1_A_SCLK|-|Pin ALT-4|FLEXIO1_FLEXIO20|-|Pin ALT-5|GPIO3_IO20|-|J1.73|DGND|DGND| -| -|G||||-| rowspan="5" |J1.75| rowspan="5" |SD2_DATA0| rowspan="5" |CPU.SD2_DATA0| rowspan="5" |Y18| rowspan="5" |NVCC_3V3| rowspan="5" |IO| rowspan="5" ||Pin ALT-0|USDHC2_DATA0|-|Pin ALT-1|ENET1_1588_EVENT0_OUT|-|Pin ALT-2|CAN2_TX|-|Pin ALT-4|FLEXIO1_FLEXIO03|-|Pin ALT-5|GPIO3_IO03|-| rowspan="5" |J1.77| rowspan="5" |SD2_DATA1| rowspan="5" |CPU.SD2_DATA1| rowspan="5" |AA18| rowspan="5" |NVCC_3V3| rowspan="5" |IO| rowspan="5" ||Pin ALT-0|USDHC2_DATA1|-|Pin ALT-1|ENET1_1588_EVENT1_IN|-|Pin ALT-2|CAN2_RX|-|Pin ALT-4|FLEXIO1_FLEXIO04|-|Pin ALT-5|GPIO3_IO04|-| rowspan="5" |J1.79| rowspan="5" |SD2_DATA2| rowspan="5" |CPU.SD2_DATA2| rowspan="5" |Y20| rowspan="5" |NVCC_3V3| rowspan="5" |IO| rowspan="5" ||Pin ALT-0|USDHC2_DATA2|-|Pin ALT-1|ENET1_1588_EVENT1_OUT|-|Pin ALT-2|MQS1_RIGHT|-|Pin ALT-4|FLEXIO1_FLEXIO05|-|Pin ALT-5|GPIO3_IO05|-| rowspan="5" |J1.81| rowspan="5" |SD2_DATA3| rowspan="5" |CPU.SD2_DATA3| rowspan="5" |AA20| rowspan="5" |NVCC_3V3| rowspan="5" |IO| rowspan="5" ||Pin ALT-0|USDHC2_DATA3|-|Pin ALT-1|LPTMR2_ALT1|-|Pin ALT-2|MQS1_LEFT|-|Pin ALT-4|FLEXIO1_FLEXIO06|-|Pin ALT-5|GPIO3_IO06|-| rowspan="6" |J1.83| rowspan="6" |SD2_CMD| rowspan="6" |CPU.SD2_CMD| rowspan="6" |Y19| rowspan="6" |NVCC_3V3| rowspan="6" |IO| rowspan="6" ||Pin ALT-0|USDHC2_CMD|-|Pin ALT-1|ENET1_1588_EVENT0_IN|-|Pin ALT-2|I3C2_PUR|-|Pin ALT-3|I3C2_PUR_B|-|Pin ALT-4|FLEXIO1_FLEXIO02|-|Pin ALT-5|GPIO3_IO02|-| rowspan="5" |J1.85| rowspan="5" |SD2_CLK| rowspan="5" |CPU.SD2_CLK| rowspan="5" |AA19| rowspan="5" |NVCC_3V3| rowspan="5" |IO| rowspan="5" ||Pin ALT-0|USDHC2_CLK|-|Pin ALT-1|ENET_QOS_1588_EVENT0_OUT|-|Pin ALT-2|I3C2_SDA|-|Pin ALT-4|FLEXIO1_FLEXIO01|-|Pin ALT-5|GPIO3_IO01|-|J1.87|DGND|DGND| -| -|G||||-| rowspan="8" |J1.89| rowspan="8" |GPIO_IO14| rowspan="8" |CPU.GPIO_IO14| rowspan="8" |P20| rowspan="8" |NVCC_3V3| rowspan="8" |IO| rowspan="8" ||Pin ALT-0|GPIO2_IO14|-|Pin ALT-1|UART3_TX|-|Pin ALT-2|CAM_DATA06|-|Pin ALT-3|DISP_DATA10|-|Pin ALT-4|SPI8_SOUT|-|Pin ALT-5|UART8_CTS_B|-|Pin ALT-6|UART4_TX|-|Pin ALT-7|FLEXIO1_FLEXIO14|-| rowspan="8" |J1.91| rowspan="8" |GPIO_IO15| rowspan="8" |CPU.GPIO_IO15| rowspan="8" |P21| rowspan="8" |NVCC_3V3| rowspan="8" |IO| rowspan="8" ||Pin ALT-0|GPIO2_IO15|-|Pin ALT-1|UART3_RX|-|Pin ALT-2|CAM_DATA07|-|Pin ALT-3|DISP_DATA11|-|Pin ALT-4|SPI8_SCK|-|Pin ALT-5|UART8_RTS_B|-|Pin ALT-6|UART4_RX|-|Pin ALT-7|FLEXIO1_FLEXIO15|-| rowspan="5" |J1.93| rowspan="5" |UART2_TXD| rowspan="5" |CPU.UART2_TXD//BOOT1| rowspan="5" |F21| rowspan="5" |NVCC_3V3| rowspan="5" |IO| rowspan="5" |Used as default console for Cortex-M33|Pin ALT-0|UART2_TX|-|Pin ALT-1|UART1_RTS_B|-|Pin ALT-2|SPI2_SCK|-|Pin ALT-3|TPM1_CH3|-|Pin ALT-5|GPIO1_IO07//BOOT_MODE[1]|-| rowspan="6" |J1.95| rowspan="6" |UART2_RXD| rowspan="6" |CPU.UART2_RXD| rowspan="6" |F20| rowspan="6" |NVCC_3V3| rowspan="6" |IO| rowspan="6" |Used as default console for Cortex-M33|Pin ALT-0|UART2_RX|-|Pin ALT-1|UART1_CTS_B|-|Pin ALT-2|SPI2_SOUT|-|Pin ALT-3|TPM1_CH2|-|Pin ALT-4|SAI1_MCLK|-|Pin ALT-5|GPIO1_IO06|-| rowspan="5" |J1.97| rowspan="5" |SD2_VSELECT| rowspan="5" |CPU.SD2_VSELECT| rowspan="5" |V18| rowspan="5" |NVCC_3V3| rowspan="5" |IO| rowspan="5" ||Pin ALT-0|USDHC2_VSELECT|-|Pin ALT-1|USHDC2_WP|-|Pin ALT-2|LPTMR2_ALT3|-|Pin ALT-4|FLEXIO1_FLEXIO19|-|Pin ALT-5|GPIO3_IO19|-| rowspan="4" |J1.99| rowspan="4" |SD2_RESET_B| rowspan="4" |CPU.SD2_RESET_B| rowspan="4" |AA17| rowspan="4" |NVCC_3V3| rowspan="4" |IO| rowspan="4" ||Pin ALT-0|USDHC2_RESET_B|-|Pin ALT-1|LPTMR2_ALT2|-|Pin ALT-4|FLEXIO1_FLEXIO07|-|Pin ALT-5|GPIO3_IO07|-| rowspan="5" |J1.101| rowspan="5" |I2C1_SCL| rowspan="5" |CPU.I2C1_SCL| rowspan="5" |C20| rowspan="5" |NVCC_3V3| rowspan="5" |IO| rowspan="5" ||Pin ALT-0|I2C1_SCL|-|Pin ALT-1|I3C1_SCL|-|Pin ALT-2|UART1_DCB_B|-|Pin ALT-3|TPM2_CH0|-|Pin ALT-5|GPIO1_IO00|-| rowspan="5" |J1.103| rowspan="5" |I2C1_SDA| rowspan="5" |CPU.I2C1_SDA| rowspan="5" |C21| rowspan="5" |NVCC_3V3| rowspan="5" |IO| rowspan="5" ||Pin ALT-0|I2C1_SDA|-|Pin ALT-1|I3C1_SDA|-|Pin ALT-2|UART1_RIN_B|-|Pin ALT-3|TPM2_CH1|-|Pin ALT-5|GPIO1_IO01|-| rowspan="6" |J1.105| rowspan="6" |SAI1_TXD0| rowspan="6" |CPU.SAI1_TXD0//BOOT3| rowspan="6" |H21| rowspan="6" |NVCC_3V3| rowspan="6" |IO| rowspan="6" ||Pin ALT-0|SAI1_TX_DATA00|-|Pin ALT-1|UART2_RTS_B|-|Pin ALT-2|SPI1_SCK|-|Pin ALT-3|UART1_DTR_B|-|Pin ALT-4|CAN1_TX|-|Pin ALT-5|GPIO1_IO13//BOOT_MODE[3]|-| rowspan="6" |J1.107| rowspan="6" |SAI1_TXC| rowspan="6" |CPU.SAI1_TXC| rowspan="6" |G20| rowspan="6" |NVCC_3V3| rowspan="6" |IO| rowspan="6" ||Pin ALT-0|SAI1_TX_BCLK|-|Pin ALT-1|UART2_CTS_B|-|Pin ALT-2|SPI1_SIN|-|Pin ALT-3|UART1_DSR_B|-|Pin ALT-4|CAN1_RX|-|Pin ALT-5|GPIO1_IO12|-|J1.109|DGND|DGND| -| -|G||||-| rowspan="1" |J1.111| rowspan="1" |ADC_IN0| rowspan="1" |CPU.ADC_IN0| rowspan="1" |B19| rowspan="1" |NVCC_3V3| rowspan="1" |IO| rowspan="1" ||Pin ALT-0|ADC_IN0|-| rowspan="1" |J1.113| rowspan="1" |ADC_IN1| rowspan="1" |CPU.ADC_IN1| rowspan="1" |A20| rowspan="1" |NVCC_3V3| rowspan="1" |IO| rowspan="1" ||Pin ALT-0|ADC_IN1|-| rowspan="1" |J1.115| rowspan="1" |ADC_IN2| rowspan="1" |CPU.ADC_IN2| rowspan="1" |B20| rowspan="1" |NVCC_3V3| rowspan="1" |IO| rowspan="1" ||Pin ALT-0|ADC_IN2|-| rowspan="1" |J1.117| rowspan="1" |ADC_IN3| rowspan="1" |CPU.ADC_IN3| rowspan="1" |B21| rowspan="1" |NVCC_3V3| rowspan="1" |IO| rowspan="1" ||Pin ALT-0|ADC_IN3|-|J1.119|PMIC_SCLH|PMIC.SCLH|25| -|||||-|J1.121|PMIC_SDAH|PMIC.SDAH|24| -|||||-|J1.123|PMIC_SCLL|PMIC.SCLL|27| -|||||-|J1.125|PMIC_SDAL|PMIC.SDAL|26| -|||||-| rowspan="5" |J1.127| rowspan="5" |I2C2_SDA| rowspan="5" |CPU.I2C2_SDA<br>PMIC.SDA| rowspan="5" |D21<br>42| rowspan="5" |NVCC_3V3| rowspan="5" |IO| rowspan="5" ||Pin ALT-0|I2C2_SDA|-|Pin ALT-3|UART2_RIN_B|-|Pin ALT-4|TPM2_CH3|-|Pin ALT-5|SAI1_RX_BCLK|-|Pin ALT-5|GPIO1_IO03|-| rowspan="7" |J1.129| rowspan="7" |I2C2_SCL| rowspan="7" |CPU.I2C2_SCL<br>PMIC.SCL| rowspan="7" |D20<br>41| rowspan="7" |NVCC_3V3| rowspan="7" |IO| rowspan="7" ||Pin ALT-0|I2C2_SCL|-|Pin ALT-1|I3C1_PUR|-|Pin ALT-3|UART2_DCB_B|-|Pin ALT-4|TPM2_CH2|-|Pin ALT-5|SAI1_RX_SYNC|-|Pin ALT-5|GPIO1_IO02|-|Pin ALT-6|I3C1_PUR_B|-|J1.131|DGND|DGND| -| -|G||||-|J1.133|LVDS_CLK_N|CPU.LVDS_CLK_N|A3|VDD_ANA_1V8|D||||-|J1.135|LVDS_CLK_P|CPU.LVDS_CLK_P|B3|VDD_ANA_1V8|D||||-|J1.137|LVDS_TX0_N|CPU.LVDS_TX0_N|A5|VDD_ANA_1V8|D||||-|J1.139|LVDS_TX0_P|CPU.LVDS_TX0_P|B5|VDD_ANA_1V8|D||||-|J1.141|LVDS_TX1_N|CPU.LVDS_TX1_N|A4|VDD_ANA_1V8|D||||-|J1.143|LVDS_TX1_P|CPU.LVDS_TX1_P|B4|VDD_ANA_1V8|D||||-|J1.145|LVDS_TX2_N|CPU.LVDS_TX2_N|A2|VDD_ANA_1V8|D||||-|J1.147|LVDS_TX2_P|CPU.LVDS_TX2_P|B2|VDD_ANA_1V8|D||||-|J1.149|LVDS_TX3_N|CPU.LVDS_TX3_N|B1|VDD_ANA_1V8|D||||-|J1.151|LVDS_TX3_P|CPU.LVDS_TX3_P|C1|VDD_ANA_1V8|D||||-|J1.153|DGND|DGND| -| -|G||||-|J1.155|DSI_CLK_N|CPU.DSI_CLK_N|D6|VDD_ANA_1V8|D||||-|J1.157|DSI_CLK_P|CPU.DSI_CLK_P|E6|VDD_ANA_1V8|D||||-|J1.159|DSI_TX0_N|CPU.DSI_TX0_N|A6|VDD_ANA_1V8|D||||-|J1.161|DSI_TX0_P|CPU.DSI_TX0_P|B6|VDD_ANA_1V8|D||||-|J1.163|DSI_TX1_N|CPU.DSI_TX1_N|A7|VDD_ANA_1V8|D||||-|J1.165|DSI_TX1_P|CPU.DSI_TX1_P|B7|VDD_ANA_1V8|D||||-|J1.167|DSI_TX2_N|CPU.DSI_TX2_N|A8|VDD_ANA_1V8|D||||-|J1.169|DSI_TX2_P|CPU.DSI_TX2_P|B8|VDD_ANA_1V8|D||||-|J1.171|DSI_TX3_N|CPU.DSI_TX3_N|A9|VDD_ANA_1V8|D||||-|J1.173|DSI_TX3_P|CPU.DSI_TX3_P|B9|VDD_ANA_1V8|D||||-|J1.175|DGND|DGND| -| -|G||||-| rowspan="5" |J1.177| rowspan="5" |SD2_CD_B| rowspan="5" |CPU.GPIO_IO08| rowspan="5" |M20| rowspan="5" |NVCC_3V3| rowspan="5" |IO| rowspan="5" ||Pin ALT-0|USDHC2_CD_B|-|Pin ALT-1|ENET_QOS_1588_EVENT0_IN|-|Pin ALT-2|I2C3_SCL|-|Pin ALT-4|FLEXIO1_FLEXIO00|-|Pin ALT-5|GPIO3_IO00|-| rowspan="8" |J1.179| rowspan="8" |GPIO_IO00| rowspan="8" |CPU.GPIO_IO00| rowspan="8" |J21| rowspan="8" |NVCC_3V3| rowspan="8" |IO| rowspan="8" ||Pin ALT-0|GPIO2_IO00|-|Pin ALT-1|I2C3_SDA|-|Pin ALT-2|CAM_CLK |-|Pin ALT-3|DISP_CLK |-|Pin ALT-4|SPI6_PCS0|-|Pin ALT-5|UART5_TX|-|Pin ALT-6|I2C5_SDA|-|Pin ALT-7|FLEXIO1_FLEXIO00|-| rowspan="8" |J1.181| rowspan="8" |GPIO_IO03| rowspan="8" |CPU.GPIO_IO03| rowspan="8" |K21| rowspan="8" |NVCC_3V3| rowspan="8" |IO| rowspan="8" ||Pin ALT-0|GPIO2_IO03|-|Pin ALT-1|I2C4_SCL|-|Pin ALT-2|CAM_HSYNC|-|Pin ALT-3|DISP_HSYNC|-|Pin ALT-4|SPI6_SCK|-|Pin ALT-5|UART5_RTS_B|-|Pin ALT-6|I2C6_SCL|-|Pin ALT-7|FLEXIO1_FLEXIO03|-| rowspan="8" |J1.183| rowspan="8" |GPIO_IO01| rowspan="8" |CPU.GPIO_IO01| rowspan="8" |K21| rowspan="8" |NVCC_3V3| rowspan="8" |IO| rowspan="8" ||Pin ALT-0|GPIO2_IO01|-|Pin ALT-1|I2C3_SCL|-|Pin ALT-2|CAM_DATA00|-|Pin ALT-3|DISP_DE|-|Pin ALT-4|SPI6_SIN|-|Pin ALT-5|UART5_RX|-|Pin ALT-6|I2C5_SCL|-|Pin ALT-7|FLEXIO1_FLEXIO01|-|J1.185| -| -| -| -|||||-| rowspan="5" |J1.187| rowspan="5" |UART1_TXD| rowspan="5" |CPU.UART1_TXD//BOOT0| rowspan="5" |E21| rowspan="5" |NVCC_3V3| rowspan="5" |IO| rowspan="5" |Used as default Linux console (Cortex-A55)|Pin ALT-0|UART1_TX|-|Pin ALT-1|SECO_UART_TX|-|Pin ALT-2|SPI2_PCS0|-|Pin ALT-3|TPM1_CH1|-|Pin ALT-5|GPIO1_IO05//BOOT_MODE[0]|-| rowspan="5" |J1.189| rowspan="5" |UART1_RXD| rowspan="5" |CPU.UART1_RXD| rowspan="5" |E20| rowspan="5" |NVCC_3V3| rowspan="5" |IO| rowspan="5" |Used as default Linux console (Cortex-A55)|Pin ALT-0|UART1_RX|-|Pin ALT-1|SECO_UART_RX|-|Pin ALT-2|SPI2_SIN|-|Pin ALT-3|TPM1_CH0|-|Pin ALT-5|GPIO1_IO04|-| rowspan="8" |J1.191| rowspan="8" |GPIO_IO12| rowspan="8" |CPU.GPIO_IO12| rowspan="8" |N20| rowspan="8" |NVCC_3V3| rowspan="8" |IO| rowspan="8" ||Pin ALT-0|GPIO2_IO12|-|Pin ALT-1|TPM3_CH2|-|Pin ALT-2|PDM_BIT_STREAM02|-|Pin ALT-3|DISP_DATA08|-|Pin ALT-4|SPI8_PCS0|-|Pin ALT-5|UART8_TX|-|Pin ALT-6|I2C8_SDA|-|Pin ALT-7|SAI3_RX_SYNC|-| rowspan="8" |J1.193| rowspan="8" |GPIO_IO13| rowspan="8" |CPU.GPIO_IO13| rowspan="8" |N21| rowspan="8" |NVCC_3V3| rowspan="8" |IO| rowspan="8" ||Pin ALT-0|GPIO2_IO13|-|Pin ALT-1|TPM4_CH2|-|Pin ALT-2|PDM_BIT_STREAM03|-|Pin ALT-3|DISP_DATA09|-|Pin ALT-4|SPI8_SIN|-|Pin ALT-5|UART8_RX|-|Pin ALT-6|I2C8_SCL|-|Pin ALT-7|FLEXIO1_FLEXIO13|-| rowspan="8" |J1.195| rowspan="8" |GPIO_IO02| rowspan="8" |CPU.GPIO_IO02| rowspan="8" |K21| rowspan="8" |NVCC_3V3| rowspan="8" |IO| rowspan="8" ||Pin ALT-0|GPIO2_IO13|-|Pin ALT-1|I2C4_SDA
|-
|Pin ALT-2
|PDM.BIT_STREAM[1]CAM_VSYNC
|-
|Pin ALT-3
|LCDIF.D[2]DISP_VSYNC
|-
|Pin ALT-4
|SPI7.SOUTSPI6_SOUT
|-
|Pin ALT-5
|UART6.CTS_BUART5_CTS_B
|-
|Pin ALT-6
|I2C7.SDAI2C6_SDA
|-
|Pin ALT-7
|FLEXIO1FLEXIO1_FLEXIO02|-|J1.FLEXIO[197| -| -| -| -|||||-| rowspan="7" |J1.199| rowspan="7" |PDM_BIT_STREAM0| rowspan="7" |CPU.PDM_BIT_STREAM0| rowspan="7" |J17| rowspan="7" |NVCC_3V3| rowspan="7" |IO| rowspan="7" ||Pin ALT-0|PDM_BIT_STREAM00|-|Pin ALT-1|MQS1_RIGHT|-|Pin ALT-2|SPI1_PCS1|-|Pin ALT-3|TPM1_EXTCLK|-|Pin ALT-4|LPTMR1_ALT2|-|Pin ALT-5|GPIO1_IO09|-|Pin ALT-6|CAN1_RX|-| rowspan="5" |J1.201| rowspan="5" |PDM_CLK| rowspan="5" |CPU.PDM_CLK| rowspan="5" |G17| rowspan="5" |NVCC_3V3| rowspan="5" |IO| rowspan="5" ||Pin ALT-0|PDM_CLK|-|Pin ALT-1|MQS1_LEFT|-|Pin ALT-4|LPTMR1_ALT1|-|Pin ALT-5|GPIO1_IO08|-|Pin ALT-6]|CAN1_TX|-|J1.203|DGND|DGND| -| -|G|||
|}
==Pinout Table EVEN pins declaration ==
{| class="wikitable"
! latexfontsize="scriptsize" | Pin
! latexfontsize="scriptsize" | Pin Name
! latexfontsize="scriptsize" | Internal Connections
! latexfontsize="scriptsize" | Ball/pin #
! latexfontsize="scriptsize" |Voltage
domain
! latexfontsize="scriptsize" | Type
! latexfontsize="scriptsize" | Notes
! colspan="2" latexfontsize="scriptsize" | Alternative Functions
|-
|J1.2
|DGND
|DGND
| -
| -
|G
|
|
|
|-
|J1.4
|3.3VIN
|INPUT VOLTAGE
| -
|3.3VIN
|S
|
|
|
|-
|J1.6
|3.3VIN
|INPUT VOLTAGE
| -
|3.3VIN
|S
|
|
|
|-
|J1.8
|3.3VIN
|INPUT VOLTAGE
| -
|3.3VIN
|S
|
|
|
|-
|J1.10
|3.3VIN
|INPUT VOLTAGE
| -
|3.3VIN
|S
|
|
|
|-
|J1.12
|DGND
|DGND
| -
| -
|G
|
|
|
|-
|J1.14
|SYS_NRST
|PMIC.PMIC_RST_B
|8
|
|I
|
|
|
|-
|J1.16
|CPU_ON_OFF
|CPU.ON_OFF
|A19
|NVCC_3V3
|I
|
|
|
|-
|J1.18
|SOM_PGOOD
| -
| -
|NVCC_3V3
|O
|
|
|
|-
|J1.20
|BOOT_MODE_SEL
|BOOT MODE SELECTION
| -
|NVCC_3V3
|I
|internal pull-up to NVCC_3V3
|
|
|-
|J1.22
|CPU_PORn
|CPU.POR_B
PMIC.POR_B
|A16
9
|NVCC_BBSM_1V8
|I/O
|internal pull-up 100k to NVCC_BBSM_1V8
|
|
|-
|J1.24
|PMIC_ON_REQ
|PMIC.PMIC_ON_REQ
|39
|NVCC_BBSM_1V8
|I
|internal pull-up 100k to NVCC_BBSM_1V8
|
|
|-
| rowspan="6" |J1.26
| rowspan="6" |PDM_BIT_STREAM1
| rowspan="6" |CPU.PDM_BIT_STREAM1
| rowspan="6" |JG18
| rowspan="6" |NVCC_3V3
| rowspan="6" |IO
| rowspan="6" |
|Pin ALT-0
|PDM_BIT_STREAM01
|-
|Pin ALT-1
|NMI_GLUE_NMI
|-
|Pin ALT-2
|SPI2_PCS1
|-
|Pin ALT-3
|TPM2_EXTCLK
|-
|Pin ALT-4
|LPTMR1_ALT3
|-
|Pin ALT-5
|GPIO1_IO10
|-
| rowspan="2" |J1.28
| rowspan="2" |WDOG_ANY
| rowspan="2" |CPU.PDM_BIT_STREAM1
| rowspan="2" |JG18
| rowspan="2" |NVCC_3V3
| rowspan="2" |IO
| rowspan="2" |
|Pin ALT-0
|WDOG1_WDOG_ANY
|-
|Pin ALT-5
|GPIO1_IO15
|-
|J1.30
|DGND
|DGND
| -
| -
|G
|
|
|
|-
|J1.32
|PMIC_STBY_REQ
|PMIC.PMIC_STBY_REQ
|40
|NVCC_BBSM_1V8
|O
|
|
|
|-
| rowspan="8" |J1.34
| rowspan="8" |GPIO_IO17
| rowspan="8" |CPU.GPIO_IO17
| rowspan="8" |R20
| rowspan="8" |NVCC_3V3
| rowspan="8" |IO
| rowspan="8" |
|Pin ALT-0
|GPIO2_IO17
|-
|Pin ALT-1
|SAI3_MCLK
|-
|Pin ALT-2
|CAM_DATA08
|-
|Pin ALT-3
|DISP_DATA13
|-
|Pin ALT-4
|UART3_RTS_B
|-
|Pin ALT-5
|SPI4_PCS1
|-
|Pin ALT-6
|UART4_RTS_B
|-
|Pin ALT-7
|FLEXIO1_FLEXIO17
|-
| rowspan="8" |J1.36
| rowspan="8" |GPIO_IO21
| rowspan="8" |CPU.GPIO_IO21
| rowspan="8" |T21
| rowspan="8" |NVCC_3V3
| rowspan="8" |IO
| rowspan="8" |
|Pin ALT-0
|GPIO2_IO21
|-
|Pin ALT-1
|SAI3_TX_DATA00
|-
|Pin ALT-2
|PDM_CLK
|-
|Pin ALT-3
|DISP_DATA17
|-
|Pin ALT-4
|SPI5_SCK
|-
|Pin ALT-5
|SPI4_SCK
|-
|Pin ALT-6
|TPM4_CH1
|-
|Pin ALT-7
|SAI3_RX_BCLK
|-
| rowspan="3" |J1.38
| rowspan="3" |GPIO_IO29
| rowspan="3" |CPU.GPIO_IO29
| rowspan="3" |Y21
| rowspan="3" |NVCC_3V3
| rowspan="3" |IO
| rowspan="3" |
|Pin ALT-0
|GPIO2_IO29
|-
|Pin ALT-1
|I2C3_SCL
|-
|Pin ALT-7
|FLEXIO1_FLEXIO29
|-
| rowspan="8" |J1.40
| rowspan="8" |GPIO_IO07
| rowspan="8" |CPU.GPIO_IO07
| rowspan="8" |L21
| rowspan="8" |NVCC_3V3
| rowspan="8" |IO
| rowspan="8" |
|Pin ALT-0
|GPIO2_IO07
|-
|Pin ALT-1
|SPI3_PCS1
|-
|Pin ALT-2
|CAM_DATA01
|-
|Pin ALT-3
|DISP_DATA03
|-
|Pin ALT-4
|SPI7_SCK
|-
|Pin ALT-5
|UART6_RTS_B
|-
|Pin ALT-6
|I2C7_SCL
|-
|Pin ALT-7
|FLEXIO1_FLEXIO07
|-
| rowspan="8" |J1.42
| rowspan="8" |GPIO_IO25//CAN_H
| rowspan="8" |CPU.GPIO_IO25
CAN.CANH
| rowspan="8" |V21
7
| rowspan="8" |NVCC_3V3
| rowspan="8" |IO
| rowspan="8" |optional CAN transceiver
|Pin ALT-0
|GPIO2_IO25
|-
|Pin ALT-1
|USDHC3_DATA1
|-
|Pin ALT-2
|CAN2_TX
|-
|Pin ALT-3
|DISP_DATA21
|-
|Pin ALT-4
|TPM4_CH3
|-
|Pin ALT-5
|JTAG_MUX_TCK
|-
|Pin ALT-6
|SPI7_PCS1
|-
|Pin ALT-7
|FLEXIO1_FLEXIO25
|-
| rowspan="8" |J1.44
| rowspan="8" |GPIO_IO27//CAN_L
| rowspan="8" |CPU.GPIO_IO27
CAN.CANL
| rowspan="8" |W21
6
| rowspan="8" |NVCC_3V3
| rowspan="8" |IO
| rowspan="8" |optional CAN transceiver
|Pin ALT-0
|GPIO2_IO27
|-
|Pin ALT-1
|USDHC3_DATA3
|-
|Pin ALT-2
|CAN2_RX
|-
|Pin ALT-3
|DISP_DATA23
|-
|Pin ALT-4
|TPM6_CH3
|-
|Pin ALT-5
|JTAG_MUX_TMS
|-
|Pin ALT-6
|SPI5_PCS1
|-
|Pin ALT-7
|FLEXIO1_FLEXIO27
|-
| rowspan="7" |J1.46
| rowspan="7" |GPIO_IO24
| rowspan="7" |CPU.GPIO_IO24
| rowspan="7" |U21
| rowspan="7" |NVCC_3V3
| rowspan="7" |IO
| rowspan="7" |
|Pin ALT-0
|GPIO2_IO24
|-
|Pin ALT-1
|USDHC3_DATA0
|-
|Pin ALT-3
|DISP_DATA20
|-
|Pin ALT-4
|TPM3_CH3
|-
|Pin ALT-5
|JTAG_MUX_TDO
|-
|Pin ALT-6
|SPI6_PSC1
|-
|Pin ALT-7
|FLEXIO1_FLEXIO24
|-
| rowspan="3" |J1.48
| rowspan="3" |GPIO_IO28
| rowspan="3" |CPU.GPIO_IO28
| rowspan="3" |W20
| rowspan="3" |NVCC_3V3
| rowspan="3" |IO
| rowspan="3" |
|Pin ALT-0
|GPIO2_IO28
|-
|Pin ALT-1
|I2C3_SDA
|-
|Pin ALT-7
|FLEXIO1_FLEXIO28
|-
| rowspan="3" |J1.50
| rowspan="3" |CCM_CLK01
| rowspan="3" |CPU.CCM_CLK01
| rowspan="3" |AA2
| rowspan="3" |NVCC_3V3
| rowspan="3" |IO
| rowspan="3" |
|Pin ALT-0
|CCMSRCGPCMIX_CLK01
|-
|Pin ALT-4
|FLEXIO1_FLEXIO26
|-
|Pin ALT-5
|GPIO3_IO26
|-
| rowspan="3" |J1.52
| rowspan="3" |CCM_CLK02
| rowspan="3" |CPU.CCM_CLK02
| rowspan="3" |Y3
| rowspan="3" |NVCC_3V3
| rowspan="3" |IO
| rowspan="3" |
|Pin ALT-0
|CCMSRCGPCMIX_CLK02
|-
|Pin ALT-4
|FLEXIO1_FLEXIO27
|-
|Pin ALT-5
|GPIO3_IO27
|-
| rowspan="3" |J1.54
| rowspan="3" |CCM_CLK03
| rowspan="3" |CPU.CCM_CLK03
| rowspan="3" |U4
| rowspan="3" |NVCC_3V3
| rowspan="3" |IO
| rowspan="3" |
|Pin ALT-0
|CCMSRCGPCMIX_CLK01
|-
|Pin ALT-4
|FLEXIO2_FLEXIO28
|-
|Pin ALT-5
|GPIO4_IO28
|-
|J1.56
|DGND
|DGND
| -
| -
|G
|
|
|
|-
|J1.58
|ETH_RSTn
|LAN.RESETn
|43
|NVCC_3V3
|I
|Hardware mounting option
|
|
|-
|J1.60
|ETH_INTn
|LAN.INT_N
|39
|NVCC_3V3
|O
|Hardware mounting option
|
|
|-
| rowspan="6" |J1.62
| rowspan="6" |SAI1_RXD0
| rowspan="6" |CPU.SAI1_RXD0
| rowspan="6" |H20
| rowspan="6" |NVCC_3V3
| rowspan="6" |IO
| rowspan="6" |
|Pin ALT-0
|SAI1_RX_DATA00
|-
|Pin ALT-1
|SAI1_MCLK
|-
|Pin ALT-2
|SPI1_SOUT
|-
|Pin ALT-3
|UART2_DSR_B
|-
|Pin ALT-4
|MQS1_RIGHT
|-
|Pin ALT-5
|GPIO1_IO14
|-
| rowspan="3" |J1.64
| rowspan="3" |CCM_CLK04
| rowspan="3" |CPU.CCM_CLK04
| rowspan="3" |V4
| rowspan="3" |NVCC_3V3
| rowspan="3" |IO
| rowspan="3" |
|Pin ALT-0
|CCMSRCGPCMIX_CLK04
|-
|Pin ALT-4
|FLEXIO2_FLEXIO29
|-
|Pin ALT-5
|GPIO4_IO29
|-
| rowspan="8" |J1.66
| rowspan="8" |GPIO_IO16
| rowspan="8" |CPU.GPIO_IO16
| rowspan="8" |R21
| rowspan="8" |NVCC_3V3
| rowspan="8" |IO
| rowspan="8" |
|Pin ALT-0
|GPIO2_IO16
|-
|Pin ALT-1
|SAI3_TX_BCLK
|-
|Pin ALT-2
|PDM_BIT_STREAM02
|-
|Pin ALT-3
|DISP_DATA12
|-
|Pin ALT-4
|UART3_CTS_B
|-
|Pin ALT-5
|SPI4_PCS2
|-
|Pin ALT-6
|UART4_CTS_B
|-
|Pin ALT-7
|FLEXIO1_FLEXIO16
|-
| rowspan="8" |J1.68
| rowspan="8" |GPIO_IO19
| rowspan="8" |CPU.GPIO_IO19
| rowspan="8" |R17
| rowspan="8" |NVCC_3V3
| rowspan="8" |IO
| rowspan="8" |
|Pin ALT-0
|GPIO2_IO19
|-
|Pin ALT-1
|SAI3_RX_SYNC
|-
|Pin ALT-2
|PDM_BIT_STREAM03
|-
|Pin ALT-3
|DISP_DATA15
|-
|Pin ALT-4
|SPI5_SIN
|-
|Pin ALT-5
|SPI4_SIN
|-
|Pin ALT-6
|TPM4_CH2
|-
|Pin ALT-7
|SAI3_TX_DATA00
|-
| rowspan="8" |J1.70
| rowspan="8" |GPIO_IO26
| rowspan="8" |CPU.GPIO_IO26
| rowspan="8" |V20
| rowspan="8" |NVCC_3V3
| rowspan="8" |IO
| rowspan="8" |
|Pin ALT-0
|GPIO2_IO26
|-
|Pin ALT-1
|USDHC3_DATA2
|-
|Pin ALT-2
|PDM_BIT_STREAM01
|-
|Pin ALT-3
|DISP_DATA22
|-
|Pin ALT-4
|TPM3_CH3
|-
|Pin ALT-5
|JTAG_MUX_TDI
|-
|Pin ALT-6
|SPI8_PCS1
|-
|Pin ALT-7
|SAI3_TX_SYNC
|-
| rowspan="8" |J1.72
| rowspan="8" |GPIO_IO20
| rowspan="8" |CPU.GPIO_IO20
| rowspan="8" |T20
| rowspan="8" |NVCC_3V3
| rowspan="8" |IO
| rowspan="8" |
|Pin ALT-0
|GPIO2_IO20
|-
|Pin ALT-1
|SAI3_RX_DATA00
|-
|Pin ALT-2
|PDM_BIT_STREAM00
|-
|Pin ALT-3
|DISP_DATA16
|-
|Pin ALT-4
|SPI5_SOUT
|-
|Pin ALT-5
|SPI4_SOUT
|-
|Pin ALT-6
|TPM3_CH1
|-
|Pin ALT-7
|FLEXIO1_FLEXIO20
|-
| rowspan="8" |J1.74
| rowspan="8" |GPIO_IO22
| rowspan="8" |CPU.GPIO_IO22
| rowspan="8" |U18
| rowspan="8" |NVCC_3V3
| rowspan="8" |IO
| rowspan="8" |
|Pin ALT-0
|GPIO2_IO22
|-
|Pin ALT-1
|USDHC3_CLK
|-
|Pin ALT-2
|SPDIF_IN
|-
|Pin ALT-3
|DISP_DATA18
|-
|Pin ALT-4
|TPM5_CH1
|-
|Pin ALT-5
|TPM6_EXTCLK
|-
|Pin ALT-6
|I2C5_SDA
|-
|Pin ALT-7
|FLEXIO1_FLEXIO22
|-
| rowspan="7" |J1.76
| rowspan="7" |GPIO_IO23
| rowspan="7" |CPU.GPIO_IO23
| rowspan="7" |U20
| rowspan="7" |NVCC_3V3
| rowspan="7" |IO
| rowspan="7" |
|Pin ALT-0
|GPIO2_IO23
|-
|Pin ALT-1
|USDHC3_CMD
|-
|Pin ALT-2
|SPDIF_OUT
|-
|Pin ALT-3
|DISP_DATA19
|-
|Pin ALT-4
|TPM6_CH1
|-
|Pin ALT-6
|I2C5_SCL
|-
|Pin ALT-7
|FLEXIO1_FLEXIO23
|-
| rowspan="8" |J1.78
| rowspan="8" |GPIO_IO05
| rowspan="8" |CPU.GPIO_IO05
| rowspan="8" |L18
| rowspan="8" |NVCC_3V3
| rowspan="8" |IO
| rowspan="8" |
|Pin ALT-0
|GPIO2_IO05
|-
|Pin ALT-1
|TPM4_CH0
|-
|Pin ALT-2
|PDM_BIT_STREAM00
|-
|Pin ALT-3
|DISP_DATA01
|-
|Pin ALT-4
|SPI7_SIN
|-
|Pin ALT-5
|UART6_RX
|-
|Pin ALT-6
|I2C6_SCL
|-
|Pin ALT-7
|FLEXIO1_FLEXIO05
|-
| rowspan="8" |J1.80
| rowspan="8" |GPIO_IO04
| rowspan="8" |CPU.GPIO_IO04
| rowspan="8" |L17
| rowspan="8" |NVCC_3V3
| rowspan="8" |IO
| rowspan="8" |
|Pin ALT-0
|GPIO2_IO04
|-
|Pin ALT-1
|TPM3_CH0
|-
|Pin ALT-2
|PDM_CLK
|-
|Pin ALT-3
|DISP_DATA00
|-
|Pin ALT-4
|SPI7_PCS0
|-
|Pin ALT-5
|UART6_TX
|-
|Pin ALT-6
|I2C6_SDA
|-
|Pin ALT-7
|FLEXIO1_FLEXIO04
|-
|J1.82
|DGND
|DGND
| -
| -
|G
|
|
|
|-
| rowspan="1" |J1.84
| rowspan="1" |TAMPER0
| rowspan="1" |CPU.TAMPER0
| rowspan="1" |B16
| rowspan="1" |NVCC_3V3
| rowspan="1" |I
| rowspan="1" |
|Pin ALT-0
|BBSMMIX.TAMPER0
|-
| rowspan="1" |J1.86
| rowspan="1" |TAMPER1
| rowspan="1" |CPU.TAMPER1
| rowspan="1" |F14
| rowspan="1" |NVCC_3V3
| rowspan="1" |I
| rowspan="1" |
|Pin ALT-0
|BBSMMIX.TAMPER1
|-
| rowspan="2" |J1.88
| rowspan="2" |CLKIN1
| rowspan="2" |CPU.CLKIN1
| rowspan="2" |B17
| rowspan="2" |NVCC_3V3
| rowspan="2" |I
| rowspan="2" |
|Pin ALT-0
|ANAMIX.CLKIN1
|-
|Pin ALT-1
|ANAMIX.ESD_DIODE
|-
| rowspan="2" |J1.90
| rowspan="2" |CLKIN2
| rowspan="2" |CPU.CLKIN2
| rowspan="2" |A18
| rowspan="2" |NVCC_3V3
| rowspan="2" |I
| rowspan="2" |
|Pin ALT-0
|ANAMIX.CLKIN2
|-
|Pin ALT-1
|ANAMIX.ATX
|-
| rowspan="6" |J1.92
| rowspan="6" |JTAG_TDI
| rowspan="6" |CPU.DAP_TDI
| rowspan="6" |W1
| rowspan="6" |NVCC_3V3
| rowspan="6" |IO
| rowspan="6" |
|Pin ALT-0
|JTAG_MUX_TDI
|-
|Pin ALT-1
|MQS2_LEFT
|-
|Pin ALT-3
|CAN2_TX
|-
|Pin ALT-4
|FLEXIO2_FLEXIO30
|-
|Pin ALT-5
|GPIO3_IO28
|-
|Pin ALT-6
|UART5_RX
|-
| rowspan="4" |J1.94
| rowspan="4" |JTAG_TMS
| rowspan="4" |CPU.DAP_TMS_SWDIO
| rowspan="4" |W2
| rowspan="4" |NVCC_3V3
| rowspan="4" |IO
| rowspan="4" |
|Pin ALT-0
|JTAG_MUX_TMS
|-
|Pin ALT-4
|FLEXIO2_FLEXIO31
|-
|Pin ALT-5
|GPIO3_IO29
|-
|Pin ALT-6
|UART5_RTS_B
|-
| rowspan="4" |J1.96
| rowspan="4" |JTAG_TMS
| rowspan="4" |CPU.DAP_TCLK_SWCLK
| rowspan="4" |Y1
| rowspan="4" |NVCC_3V3
| rowspan="4" |IO
| rowspan="4" |
|Pin ALT-0
|JTAG_MUX_TCK
|-
|Pin ALT-4
|FLEXIO1_FLEXIO30
|-
|Pin ALT-5
|GPIO3_IO30
|-
|Pin ALT-6
|UART5_CTS_B
|-
| rowspan="6" |J1.98
| rowspan="6" |JTAG_TDO
| rowspan="6" |CPU.DAP_TDO_TRACE_SWO
| rowspan="6" |W1
| rowspan="6" |NVCC_3V3
| rowspan="6" |IO
| rowspan="6" |
|Pin ALT-0
|JTAG_MUX_TDO
|-
|Pin ALT-1
|MQS2_RIGHT
|-
|Pin ALT-3
|CAN2_RX
|-
|Pin ALT-4
|FLEXIO1_FLEXIO31
|-
|Pin ALT-5
|GPIO3_IO31
|-
|Pin ALT-6
|UART5_TX
|-
|J1.100
|DGND
|DGND
| -
| -
|G
|
|
|
|-
|J1.102
|CSI_CLK_N
|CPU.MIPI_CSI1_CLK_N
|D10
|VDD_ANA_1V8
|D
|
|
|
|-
|J1.104
|CSI_CLK_P
|CPU.MIPI_CSI1_CLK_P
|E10
|VDD_ANA_1V8
|D
|
|
|
|-
|J1.106
|CSI_D0_N
|CPU.MIPI_CSI1_D0_N
|A11
|VDD_ANA_1V8
|D
|
|
|
|-
|J1.108
|CSI_D0_P
|CPU.MIPI_CSI1_D0_P
|B11
|VDD_ANA_1V8
|D
|
|
|
|-
|J1.110
|CSI_D1_N
|CPU.MIPI_CSI1_D1_N
|A10
|VDD_ANA_1V8
|D
|
|
|
|-
|J1.112
|CSI_D1_P
|CPU.MIPI_CSI1_D1_P
|B10
|VDD_ANA_1V8
|D
|
|
|
|-
|J1.114
|USB1_RX_N
|CPU.USB1_RX_N
|A12
|VDD_ANA_1V8
|D
|Only for i.MX933x/i.MX935x
|
|
|-
|J1.116
|USB1_RX_P
|CPU.USB1_RX_P
|B12
|VDD_ANA_1V8
|D
|Only for i.MX933x/i.MX935x
|
|
|-
|J1.118
|USB1_TX_N
|CPU.USB1_TX_N
|A13
|VDD_ANA_1V8
|D
|Only for i.MX933x/i.MX935x
|
|
|-
|J1.120
|USB1_TX_P
|CPU.USB1_TX_P
|B13
|VDD_ANA_1V8
|D
|Only for i.MX933x/i.MX935x
|
|
|-
|J1.122
|DGND
|DGND
| -
| -
|G
|
|
|
|-
| rowspan="6" |J1.124
| rowspan="6" |ENET1_MDC
| rowspan="6" |CPU.ENET1_MDC
| rowspan="6" |AA11
| rowspan="6" |NVCC_3V3
| rowspan="6" |IO
| rowspan="6" |
|Pin ALT-0
|ENET_QOS_MDC
|-
|Pin ALT-1
|UART3_DCR_B
|-
|Pin ALT-2
|I3C2_SCL
|-
|Pin ALT-3
|USB1_OTG_ID
|-
|Pin ALT-4
|FLEXIO2_FLEXIO00
|-
|Pin ALT-5
|GPIO4_IO00
|-
| rowspan="6" |J1.126
| rowspan="6" |ENET1_MDIO
| rowspan="6" |CPU.ENET1_MDIO
| rowspan="6" |AA10
| rowspan="6" |NVCC_3V3
| rowspan="6" |IO
| rowspan="6" |
|Pin ALT-0
|ENET_QOS_MDIO
|-
|Pin ALT-1
|UART3_RIN_B
|-
|Pin ALT-2
|I3C2_SDA
|-
|Pin ALT-3
|USB1_OTG_PWR
|-
|Pin ALT-4
|FLEXIO2_FLEXIO01
|-
|Pin ALT-5
|GPIO4_IO01
|-
| rowspan="3" |J1.128
| rowspan="3" |SD1_CLK
| rowspan="3" |CPU.SD1_CLK
| rowspan="3" |Y11
| rowspan="3" |NVCC_3V3
| rowspan="3" |IO
| rowspan="3" |
|Pin ALT-0
|USDHC1_CLK
|-
|Pin ALT-4
|FLEXIO1_FLEXIO08
|-
|Pin ALT-5
|GPIO3_IO08
|-
| rowspan="3" |J1.130
| rowspan="3" |SD1_CMD
| rowspan="3" |CPU.SD1_CMD
| rowspan="3" |AA12
| rowspan="3" |NVCC_3V3
| rowspan="3" |IO
| rowspan="3" |
|Pin ALT-0
|USDHC1_CMD
|-
|Pin ALT-4
|FLEXIO1_FLEXIO09
|-
|Pin ALT-5
|GPIO3_IO09
|-
|J1.132
|ETH1_LED5
|LAN.LED5/GPIO4
|13
|NVCC_3V3
|O
|
|
|
|-
| rowspan="4" |J1.134
| rowspan="4" |SD1_STROBE
| rowspan="4" |CPU.SD1_CLK
| rowspan="4" |Y11
| rowspan="4" |NVCC_3V3
| rowspan="4" |IO
| rowspan="4" |
|Pin ALT-0
|USDHC1_CLK
|-
|Pin ALT-1
|FLEXSPI1_A_DQS
|-
|Pin ALT-4
|FLEXIO1_FLEXIO18
|-
|Pin ALT-5
|GPIO3_IO018
|-
|J1.136
|
|
|
|
|
|
|
|
|-
| rowspan="3" |J1.138
| rowspan="3" |SD1_DATA0
| rowspan="3" |CPU.SD1_DATA0
| rowspan="3" |AA14
| rowspan="3" |NVCC_3V3
| rowspan="3" |IO
| rowspan="3" |
|Pin ALT-0
|USDHC1_DATA0
|-
|Pin ALT-4
|FLEXIO1_FLEXIO10
|-
|Pin ALT-5
|GPIO3_IO10
|-
| rowspan="3" |J1.140
| rowspan="3" |SD1_DATA1
| rowspan="3" |CPU.SD1_DATA1
| rowspan="3" |AA15
| rowspan="3" |NVCC_3V3
| rowspan="3" |IO
| rowspan="3" |
|Pin ALT-0
|USDHC1_DATA1
|-
|Pin ALT-4
|FLEXIO1_FLEXIO11
|-
|Pin ALT-5
|GPIO3_IO11
|-
| rowspan="3" |J1.142
| rowspan="3" |SD1_DATA2
| rowspan="3" |CPU.SD1_DATA2
| rowspan="3" |AA16
| rowspan="3" |NVCC_3V3
| rowspan="3" |IO
| rowspan="3" |
|Pin ALT-0
|USDHC1_DATA2
|-
|Pin ALT-4
|FLEXIO1_FLEXIO12
|-
|Pin ALT-5
|GPIO3_IO12
|-
| rowspan="3" |J1.144
| rowspan="3" |SD1_DATA3
| rowspan="3" |CPU.SD1_DATA3
| rowspan="3" |Y11
| rowspan="3" |NVCC_3V3
| rowspan="3" |IO
| rowspan="3" |
|Pin ALT-0
|USDHC1_DATA3
|-
|Pin ALT-1
|FLEXSPI1_A_SS1_B
|-
|Pin ALT-4
|FLEXIO1_FLEXIO13
|-
|Pin ALT-5
|GPIO3_IO13
|-
|J1.146
|DGND
|DGND
| -
| -
|G
|
|
|
|-
| rowspan="4" |J1.148
| rowspan="4" |SD1_DATA4
| rowspan="4" |CPU.SD1_DATA4
| rowspan="4" |Y13
| rowspan="4" |NVCC_3V3
| rowspan="4" |IO
| rowspan="4" |
|Pin ALT-0
|USDHC1_DATA4
|-
|Pin ALT-1
|FLEXSPI1_A_DATA04
|-
|Pin ALT-4
|FLEXIO1_FLEXIO14
|-
|Pin ALT-5
|GPIO3_IO14
|-
| rowspan="4" |J1.150
| rowspan="4" |SD1_DATA5
| rowspan="4" |CPU.SD1_DATA5
| rowspan="4" |Y14
| rowspan="4" |NVCC_3V3
| rowspan="4" |IO
| rowspan="4" |
|Pin ALT-0
|USDHC1_DATA5
|-
|Pin ALT-1
|FLEXSPI1_A_DATA05
|-
|Pin ALT-4
|FLEXIO1_FLEXIO15
|-
|Pin ALT-5
|GPIO3_IO15
|-
| rowspan="4" |J1.152
| rowspan="4" |SD1_DATA5
| rowspan="4" |CPU.SD1_DATA6
| rowspan="4" |Y15
| rowspan="4" |NVCC_3V3
| rowspan="4" |IO
| rowspan="4" |
|Pin ALT-0
|USDHC1_DATA6
|-
|Pin ALT-1
|FLEXSPI1_A_DATA06
|-
|Pin ALT-4
|FLEXIO1_FLEXIO16
|-
|Pin ALT-5
|GPIO3_IO16
|-
| rowspan="4" |J1.154
| rowspan="4" |SD1_DATA7
| rowspan="4" |CPU.SD1_DATA7
| rowspan="4" |Y16
| rowspan="4" |NVCC_3V3
| rowspan="4" |IO
| rowspan="4" |
|Pin ALT-0
|USDHC1_DATA7
|-
|Pin ALT-1
|FLEXSPI1_A_DATA07
|-
|Pin ALT-4
|FLEXIO1_FLEXIO17
|-
|Pin ALT-5
|GPIO3_IO17
|-
| rowspan="4" |J1.156
| rowspan="4" |ENET2_TD3
| rowspan="4" |CPU.ENET2_TD3
| rowspan="4" |T10
| rowspan="4" |NVCC_3V3
| rowspan="4" |IO
| rowspan="4" |
|Pin ALT-0
|ENET1_RGMII_TD3
|-
|Pin ALT-2
|SAI2_RX_DATA00
|-
|Pin ALT-4
|FLEXIO2_FLEXIO16
|-
|Pin ALT-5
|GPIO4_IO16
|-
| rowspan="5" |J1.158
| rowspan="5" |ENET2_TD2
| rowspan="5" |CPU.ENET2_TD2
| rowspan="5" |V8
| rowspan="5" |NVCC_3V3
| rowspan="5" |IO
| rowspan="5" |
|Pin ALT-0
|ENET1_RGMII_TD2
|-
|Pin ALT-1
|ENET1_TX_CLK // CCMSRCGPMCMIX.ENET_REF_CLK_ROOT
|-
|Pin ALT-2
|SAI2_RX_DATA01
|-
|Pin ALT-4
|FLEXIO2_FLEXIO17
|-
|Pin ALT-5
|GPIO4_IO17
|-
| rowspan="5" |J1.160
| rowspan="5" |ENET2_TD1
| rowspan="5" |CPU.ENET2_TD1
| rowspan="5" |U8
| rowspan="5" |NVCC_3V3
| rowspan="5" |IO
| rowspan="5" |
|Pin ALT-0
|ENET1_RGMII_TD1
|-
|Pin ALT-1
|UART4_RTS_B
|-
|Pin ALT-2
|SAI2_RX_DATA02
|-
|Pin ALT-4
|FLEXIO2_FLEXIO18
|-
|Pin ALT-5
|GPIO4_IO18
|-
| rowspan="5" |J1.162
| rowspan="5" |ENET2_TD0
| rowspan="5" |CPU.ENET2_TD0
| rowspan="5" |T8
| rowspan="5" |NVCC_3V3
| rowspan="5" |IO
| rowspan="5" |
|Pin ALT-0
|ENET1_RGMII_TD0
|-
|Pin ALT-1
|UART4_TX
|-
|Pin ALT-2
|SAI2_RX_DATA03
|-
|Pin ALT-4
|FLEXIO2_FLEXIO19
|-
|Pin ALT-5
|GPIO4_IO19
|-
|J1.164
|DGND
|DGND
| -
| -
|G
|
|
|
|-
| rowspan="5" |J1.166
| rowspan="5" |ENET2_XC
| rowspan="5" |CPU.ENET2_XC
| rowspan="5" |U6
| rowspan="5" |NVCC_3V3
| rowspan="5" |IO
| rowspan="5" |
|Pin ALT-0
|ENET1_RGMI_TXC
|-
|Pin ALT-1
|ENET1_TX_ER
|-
|Pin ALT-2
|SAI2_TX_BCLK
|-
|Pin ALT-4
|FLEXIO2_FLEXIO21
|-
|Pin ALT-5
|GPIO4_IO21
|-
| rowspan="5" |J1.168
| rowspan="5" |ENET2_TX_CTL
| rowspan="5" |CPU.ENET2_TX_CTL
| rowspan="5" |V6
| rowspan="5" |NVCC_3V3
| rowspan="5" |IO
| rowspan="5" |
|Pin ALT-0
|ENET1_RGMI_TX_CTL
|-
|Pin ALT-1
|UART4_DTR_B
|-
|Pin ALT-2
|SAI2_TX_SYNC
|-
|Pin ALT-4
|FLEXIO2_FLEXIO20
|-
|Pin ALT-5
|GPIO4_IO20
|-
| rowspan="5" |J1.170
| rowspan="5" |ENET2_MDC
| rowspan="5" |CPU.ENET2_MDC
| rowspan="5" |Y7
| rowspan="5" |NVCC_3V3
| rowspan="5" |IO
| rowspan="5" |
|Pin ALT-0
|ENET1_MDC
|-
|Pin ALT-1
|UART4_DCR_B
|-
|Pin ALT-2
|SAI2_RX_SYNC
|-
|Pin ALT-4
|FLEXIO2_FLEXIO14
|-
|Pin ALT-5
|GPIO4_IO14
|-
| rowspan="5" |J1.172
| rowspan="5" |ENET2_MDIO
| rowspan="5" |CPU.ENET2_MDIO
| rowspan="5" |AA6
| rowspan="5" |NVCC_3V3
| rowspan="5" |IO
| rowspan="5" |
|Pin ALT-0
|ENET1_MDIO
|-
|Pin ALT-1
|UART4_RIN_B
|-
|Pin ALT-2
|SAI2_RX_BCLK
|-
|Pin ALT-4
|FLEXIO2_FLEXIO15
|-
|Pin ALT-5
|GPIO4_IO15
|-
| rowspan="5" |J1.174
| rowspan="5" |ENET2_RX_CTL
| rowspan="5" |CPU.ENET2_RX_CTL
| rowspan="5" |Y4
| rowspan="5" |NVCC_3V3
| rowspan="5" |IO
| rowspan="5" |
|Pin ALT-0
|ENET1_RGMII_RX_CTL
|-
|Pin ALT-1
|UART4_DSR_B
|-
|Pin ALT-2
|SAI2_TX_DATA00
|-
|Pin ALT-4
|FLEXIO2_FLEXIO22
|-
|Pin ALT-5
|GPIO4_IO22
|-
| rowspan="5" |J1.176
| rowspan="5" |ENET2_RD0
| rowspan="5" |CPU.ENET2_RD0
| rowspan="5" |AA4
| rowspan="5" |NVCC_3V3
| rowspan="5" |IO
| rowspan="5" |
|Pin ALT-0
|ENET1_RGMII_RD0
|-
|Pin ALT-1
|UART4_RX
|-
|Pin ALT-2
|SAI2_TX_DATA02
|-
|Pin ALT-4
|FLEXIO2_FLEXIO24
|-
|Pin ALT-5
|GPIO4_IO24
|-
| rowspan="5" |J1.178
| rowspan="5" |ENET2_RD1
| rowspan="5" |CPU.ENET2_RD1
| rowspan="5" |Y5
| rowspan="5" |NVCC_3V3
| rowspan="5" |IO
| rowspan="5" |
|Pin ALT-0
|ENET1_RGMII_RD1
|-
|Pin ALT-1
|SPDIF_IN
|-
|Pin ALT-2
|SAI2_TX_DATA03
|-
|Pin ALT-4
|FLEXIO2_FLEXIO25
|-
|Pin ALT-5
|GPIO4_IO25
|-
| rowspan="6" |J1.180
| rowspan="6" |ENET2_RD2
| rowspan="6" |CPU.ENET2_RD2
| rowspan="6" |AA5
| rowspan="6" |NVCC_3V3
| rowspan="6" |IO
| rowspan="6" |
|Pin ALT-0
|ENET1_RGMII_RD1
|-
|Pin ALT-1
|UART4_CTS_B
|-
|Pin ALT-2
|SAI2_MCLK
|-
|Pin ALT-3
|MQS2_RIGHT
|-
|Pin ALT-4
|FLEXIO2_FLEXIO26
|-
|Pin ALT-5
|GPIO4_IO26
|-
| rowspan="6" |J1.182
| rowspan="6" |ENET2_RD3
| rowspan="6" |CPU.ENET2_RD3
| rowspan="6" |Y6
| rowspan="6" |NVCC_3V3
| rowspan="6" |IO
| rowspan="6" |
|Pin ALT-0
|ENET1_RGMII_RD3
|-
|Pin ALT-1
|SPDIF_OUT
|-
|Pin ALT-2
|SPDIF_IN
|-
|Pin ALT-3
|MQS2_LEFT
|-
|Pin ALT-4
|FLEXIO2_FLEXIO27
|-
|Pin ALT-5
|GPIO4_IO27
|-
| rowspan="5" |J1.184
| rowspan="5" |ENET2_RXC
| rowspan="5" |CPU.ENET2_RXC
| rowspan="5" |AA3
| rowspan="5" |NVCC_3V3
| rowspan="5" |IO
| rowspan="5" |
|Pin ALT-0
|ENET1_RGMII_RXC
|-
|Pin ALT-1
|ENET1_RX_ER
|-
|Pin ALT-2
|SAI2_TX_DATA01
|-
|Pin ALT-4
|FLEXIO2_FLEXIO23
|-
|Pin ALT-5
|GPIO4_IO23
|-
|J1.186
|USB1_VBUS
|CPU.USB1_VBUS
|F13
|NVCC_3V3
|D
|(3V3 reference signal)
|
|
|-
|J1.188
|USB2_VBUS
|CPU.USB2_VBUS
|E14
|NVCC_3V3
|D
|(3V3 reference signal)
|
|
|-
|J1.190
|DGND
|DGND
| -
| -
|G
|
|
|
|-
|J1.192
|USB1_ID
|CPU.USB1_ID
|C11
|
|D
|
|
|
|-
|J1.194
|USB2_ID
|CPU.USB2_ID
|E12
|
|D
|
|
|
|-
|J1.196
|USB1_DN
|CPU.USB1_DN
|A14
|
|D
|
|
|
|-
|J1.198
|USB1_DP
|CPU.USB1_DP
|B14
|
|D
|
|
|
|-
|J1.200
|USB2_DP
|CPU.USB2_DP
|B15
|
|D
|
|
|
|-
|J1.202
|USB2_DN
|CPU.USB2_DN
|A15
|
|D
|
|
|
|-
|J1.204
|DGND
|DGND
| -
| -
|G
|
|
|
|}
----
[[Category:AURA]]
U0007
Bureaucrats, dave_user, Administrators
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Retrieved from "https://wiki.dave.eu/index.php/Special:MobileDiff/17897...19004"