User contributions
18 October 2019
Integration guide (Bora/BoraX)
U0007 moved page Integration guide (Bora/BoraX) to Integration guide (Bora/BoraX/BoraLite)
Integration guide (Bora/BoraX/BoraLite)
U0007 moved page Integration guide (Bora/BoraX) to Integration guide (Bora/BoraX/BoraLite)
mIntegration guide (Bora/BoraX/BoraLite)
How to implement workaround suggested by Xilinx on BoraEVB
+295
Integration guide (Bora/BoraX/BoraLite)
no edit summary
+586
File:BoraLite-i2c-glitch-filter.jpg
no edit summary
BoraLite Embedded Linux Kit (BELK)
Created page with "{{InfoBoxTop}} {{Applies To BoraLite}} {{InfoBoxBottom}} ==Introduction== 500px BoraLite Embedded Linux Kit (BELK for short) provides all the n..."
File:BoraLite-BELK.jpg
no edit summary
On board JTAG connector (BoraLite)
J2 - Connector's pinout
+9
EEPROM (BoraLite)
no edit summary
+63
17 October 2019
EEPROM (BoraLite)
Created page with "{{InfoBoxTop}} {{Applies To BoraLite}} {{InfoBoxBottom}} An on-board Microchip 24AA32AT device provides an added storage device for factory settings: * the first 32 bytes of..."
Advanced use of Yocto build system (BELK/BXELK)
no edit summary
+24
Power (Bora)
U0007 moved page Power (Bora) to Power (Bora/BoraLite)
Power (Bora/BoraLite)
U0007 moved page Power (Bora) to Power (Bora/BoraLite)
mPower (Bora/BoraLite)
no edit summary
+34
Power (Bora/BoraLite)
Power Supply Unit (PSU) and recommended power-up sequence
+125
File:BoraLite-power-sequence1.jpg
no edit summary
File:BoraLite-power-sequence.jpg
no edit summary
Physical devices mapping (BELK/BXELK)
no edit summary
+186
Processor and memory subsystem (BoraLite)
Processor Info
+3
BELK/BXELK Quick Start Guide
Target setup and first boot
+10
BELK/BXELK Quick Start Guide
no edit summary
+24
BELK/BXELK Quick Start Guide
Target setup and first boot
+105
File:BoraX-BoraXEVB-Lite-1st-boot.jpg
no edit summary
On board JTAG connector (BoraLite)
no edit summary
+1
File:BORAlite-jtag-conn1.png
no edit summary
File:BORAlite-jtag-conn.png
U0007 uploaded a new version of File:BORAlite-jtag-conn.png
File:BORAlite-jtag-conn.png
no edit summary
Processor and memory subsystem (BoraLite)
Created page with "{{InfoBoxTop}} {{Applies To BoraLite}} {{InfoBoxBottom}} = Design Overview = The heart of BORA Lite module is composed of the following components: * Xilinx Zynq XC7Z007S/01..."
Reset scheme (Bora)
U0007 moved page Reset scheme (Bora) to Reset scheme (Bora/BoraLite)
Reset scheme (Bora/BoraLite)
U0007 moved page Reset scheme (Bora) to Reset scheme (Bora/BoraLite)
mReset scheme (Bora/BoraLite)
no edit summary
+414
16 October 2019
BELK/BXELK software components
no edit summary
+24
RTC (Bora)
U0007 moved page RTC (Bora) to RTC (Bora/BoraLite)
RTC (Bora/BoraLite)
U0007 moved page RTC (Bora) to RTC (Bora/BoraLite)
mRTC (Bora/BoraLite)
no edit summary
+93
Watchdog (BoraLite)
Created page with "{{InfoBoxTop}} {{Applies To BoraLite}} {{InfoBoxBottom}} ==Description and default configuration== An external watchdog timer (WDT), Maxim MAX6373<ref name="MAX6373">https://..."
System boot and recovery via microSD card (BELK/BXELK)
no edit summary
+24
Standalone boot (BELK/BXELK)
no edit summary
+24
Restoring U-Boot on SPI NOR flash (BELK/BXELK)
no edit summary
+24
Category:BoraLite
Hardware Documentation
+2
Processing system peripherals (BoraLite)
Created page with "{{InfoBoxTop}} {{Applies To BoraLite}} {{InfoBoxBottom}} == Introduction == Bora modules implement a number of peripheral interfaces through the J1 connector. The following..."
Product serial number
no edit summary
+24
Mechanicals (BoraLite)
Created page with "{{InfoBoxTop}} {{Applies To BoraLite}} {{InfoBoxBottom}} = Mechanical specifications = This chapter describes the mechanical characteristics of the BORA Lite module. == Boa..."
Logical structure of Bora and BoraX Embedded Linux Kits (BELK/BXELK)
no edit summary
+24
Introduction to development environment (BELK/BXELK)
no edit summary
+24
Host setup and development flow (BELK/BXELK)
no edit summary
+24
ConfigID management (BELK/BXELK)
no edit summary
+575
Programmable logic (BORAXpress)
Introduction
Programmable logic (BoraLite)
no edit summary
+20,244
Programmable logic (Bora)
FPGA Bank 34