= Preface =Bora Hardware Manual describes the design and functions of Bora CPU SOMs family.
== About this manual ==== Copyright/Trademarks ==Ethernet® is a registered trademark of XEROX Corporation.All other products and trademarks mentioned in this manual are property of their respective owners.All rights reserved. Specifications may change at any time without notice.== Standards ==Dave SrL is certified to ISO 9001 standards.== Disclaimers ==== Warranty ==== Technical Support ==== Related Documents ==== Hardware Manual in PDF format == Please download the [http://wwwmirror.dave.eu/sites/defaultManuals/files/filesBORA/bora-hm.pdf Bora Hardware Manual in pdf format]== Conventions, Abbreviations, Acronyms =={| class="wikitable" | | align="center" style="background:#f0f0f0;"|'''Abbreviation'''| align="center" style="background:#f0f0f0;"|'''Definition'''|-| BTN||Button|-| GPI||General Purpose Input|-| GPIO||Generla Purpose Input and Output|-| GPO||General Purpose Output|-| BELK||Bora Embedded Linux Kit|-| PCB||Printed Circuit Board|-| RTC||Real Time Clock|-| SOM||System On Module|-| PMIC||Power Managemente Integrated Circuit|-| <br>|||-| <br>|||-| <br>|||-|+ align="bottom" style="caption-side: bottom" | Table: Abbreviations and acronyms used in this manual|}= Introduction = == Product Highlights ==== Block Diagram ==The following image shows Diva's block diagram:[[File:Bora-bd.png|400px|center]]== Feature Summary === Design Overview === Processor Info ==== RAM memory bank ==== NOR flash bank ==== NAND flash bank ==== Memory map === Mechanical specifications =This chapter describes the mechanical characteristics of the Bora module.== Board Layout ==The following figure shows the physical dimensions of the Bora module:[[File:Bora-top-quoted.png|800px|frameless|border]]The following figure highlights the maximum components' heights on Bora module:== Connectors ==The following figure shows the Diva connector layout:= Power, reset and control === Power Supply Unit (PSU) and recommended power-up sequence==The recommended power-up sequence is:=== PMIC ===== Reset scheme and voltage monitoring ==Some of these reset signals are accessible by carrier board circuitry as described below.=== EXT_PORSTn ====== PORSTn_OUT ====== WARMRSTn ====== RTC_PWRONRSTn ====== JTAG_TRSTn ====== PMIC_nRESPWRON ====== MRSTn ===== Boot Options ===== Default boot configuration ====== Boot sequence customization ===== Clock scheme ==== Recovery ===== JTAG recovery ====== SD/MMC recovery ===== Multiplexing ==== RTC ==== Watchdog === Pinout table = This chapter contains the pinout description of the connectors of the Bora module. = Peripheral interfaces == Operational Characteristics === Maximum ratings =={| class="wikitable" |-!Parameter!Min!Typ!Max!Unit|-|Main power supply voltage||||V|-|}== Recommended ratings =={| class="wikitable" |-!Parameter!Min!Typ!Max!Unit|-|Main power supply voltage||||V|-|}== Power consumption ==== Heat dissipation ==This section will be completed in a future version of this manual.= Application notes =Please refer to the following documents available on Dave Developers Wiki:* [[Carrier_board_design_guidelines_%28SOM%29]]* [[Integration_guide_%28Bora%29]]